RTAX1000S-LG624V vs RTAX250S-CG624E Comparaison
Comparaison détaillée côte à côte de RTAX1000S-LG624V par Microchip Technology et RTAX250S-CG624E par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX1000S-LG624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000S-LG624V ✓ ActifMicrochip Technology
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624E ✓ ActifComparaison des spécifications
| Paramètre | RTAX1000S-LG624V | RTAX250S-CG624E |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2 600,00 | $0,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S radiation-tolerant FPGA |
| Equivalent System Gates | 1,000,000 | — |
| Logic Cells | 18144 | — |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Technology | Digital CMOS, antifuse-based | — |
| Core Supply Voltage | 1.5 V (nominal) | 1.5 V |
| Configuration Type | One-Time Programmable (antifuse), live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Boîtier | CG624 (624-pin ceramic column grid array, LG624) | — |
| Température de fonctionnement | -55C to +125C | -55C to +125C |
| Application Domain | Space-flight systems, radiation-tolerant | — |
| Maximum Family Density | 4,000,000 equivalent system gates (family) | — |
| Type de montage | Surface Mount | Surface Mount |
| Number of User I/O | [DATA_NEEDED: number of user I/O for LG624 package] | — |
| Block RAM Capacity | [DATA_NEEDED: embedded SRAM bit capacity] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| System Gates | — | 250000 gates |
| Logic Cells (CLBs) | — | 2816 |
| Maximum Toggle Frequency | — | 649 MHz |
| Process Technology | — | 0.15 um CMOS |
| Logic Family | — | CMOS |
| CLB Combinatorial Delay (max) | — | 0.930 ns |
| Package Type | — | CCGA-624 (ceramic column grid array, 624 pins) |
| Programming Technology | — | Antifuse (one-time programmable) |
| SEU Hardening | — | SEU-hardened registers, no external TMR required |
| SEU Immunity | — | Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day |
| Power-Up Behavior | — | Live at power-up (true single-chip) |
| Target Application | — | Space-flight systems |