RTAX1000SL-LG624V vs RTAX1000SL-LG624E Comparaison
Comparaison détaillée côte à côte de RTAX1000SL-LG624V par Microchip Technology et RTAX1000SL-LG624E par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX1000SL-LG624V - Rad-Tolerant FPGA, 1M Gates | Microchip
RTAX1000SL-LG624V ✓ ActifMicrochip Technology
RTAX1000SL-LG624E - 1M-Gate Rad-Tolerant FPGA 624-LGA | Microchip
RTAX1000SL-LG624E ✓ ActifComparaison des spécifications
| Paramètre | RTAX1000SL-LG624V | RTAX1000SL-LG624E |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2 025,00 | $0,00 |
| Equivalent System Gates | 1,000,000 gates | 1,000,000 |
| Configurable Logic Blocks (CLBs) | 12096 | — |
| Logic Cells | 18144 | — |
| Technology | CMOS antifuse | — |
| Radiation Tolerance | Radiation-tolerant (space-flight grade) | — |
| Plage de température de fonctionnement | -55C to +125C | — |
| Boîtier | 624-terminal ceramic CGA (LG624) | 624-Pin LGA (CBGA624), Ceramic |
| Type de montage | Surface Mount | Surface Mount |
| Configuration Type | One-time programmable antifuse (live at power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Dedicated carry logic | — |
| Speed Grade (this MPN) | Standard (L) | — |
| CLB Combinatorial Delay (speed grade 1 variant) | 0.93 ns max | — |
| Series | RTAX-S/SL (RTAX1000SL) | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Tension d'alimentation | [DATA_NEEDED: core supply voltage] | — |
| Family | — | RTAX-SL Radiation-Tolerant FPGA |
| ASIC Gates | — | 125,000 |
| Logic Cells (CLBs) | — | 12,096 |
| Maximum Combinatorial Delay per CLB | — | 0.93 ns |
| Maximum Frequency | — | 581 MHz |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V |
| Packaging | — | Box |
| Technology Base | — | CMOS, Antifuse |
| Configuration | — | Live-at-power-up (no external configuration device) |
| Température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| I/O Voltage Range | — | [DATA_NEEDED: I/O voltage range] |
| TID Rating | — | [DATA_NEEDED: total ionizing dose rating] |
| SEU Immunity | — | [DATA_NEEDED: single-event upset immunity figure] |