RTAX2000D-CQ352V vs RTAX2000D-1CQ352B Comparaison

Comparaison détaillée côte à côte de RTAX2000D-CQ352V par Microchip Technology et RTAX2000D-1CQ352B par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.

Microchip Technology
RTAX2000D-CQ352V RTAX2000D-CQ352V - 2M-Gate Rad-Tolerant FPGA CQFP352 | Microchip

RTAX2000D-CQ352V - 2M-Gate Rad-Tolerant FPGA CQFP352 | Microchip

RTAX2000D-CQ352V ✓ Actif
Microchip Technology
RTAX2000D-1CQ352B RTAX2000D-1CQ352B - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000D-1CQ352B - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000D-1CQ352B ✓ Actif

Comparaison des spécifications

Paramètre RTAX2000D-CQ352V RTAX2000D-1CQ352B
Marque Microchip Technology Microchip Technology
Catégorie FPGA & CPLD FPGA & CPLD
Statut du cycle de vie Actif Actif
Statut du stock In Stock In Stock
Prix unitaire (USD) $2 560,00 $3 120,00
Family RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs RTAX-S/SL and RTAX-DSP (RTAX2000D)
Equivalent System Gates 2,000,000 2,000,000
Logic Cells 29,568 —
Configurable Logic Blocks (CLBs) 19,712 —
User I/O - Inputs 166 —
User I/O - Outputs 166 —
Supply Voltage (Core) 1.425 V to 1.575 V (nominal 1.5 V) —
Technology CMOS, antifuse one-time programmable Antifuse (nonvolatile), Digital CMOS
Boîtier CQFP352 ceramic quad flat pack 352-pin Ceramic Column Grid Array (CQ352)
Terminal Pitch 0.500 mm —
Type de montage Surface Mount Surface Mount (ceramic column grid array)
Configuration One-time programmable (antifuse) Live at power-up, no external configuration device (antifuse)
Embedded Memory Embedded SRAM with built-in FIFO control logic Up to 540 kbits SRAM with optional EDAC
Radiation Tolerance Radiation-tolerant (space-flight applications) —
Application Domain Space-flight systems Space-flight, radiation-tolerant
Commercial Baseline Family Actel/Microsemi Axcelerator —
CLBs (Logic Cells) — 19,712 CLBs / 29,568 logic cells (per family organization)
DSP Mathblocks — Up to 120 (18-bit x 18-bit MAC)
DSP Performance — 125 MHz 18-bit x 18-bit multiply-accumulate
Total Ionizing Dose — 300 krad (Si) functional / 200 krad (Si) with operation
Core Supply Voltage — 1.5 V nominal (1.425 V to 1.575 V)
Speed Grade — -1
Temperature Range — Commercial (C)
Routing Features — Segmentable clocks, chip-wide highway routing, carry logic
Embedded SRAM Features — Built-in FIFO control logic

Fiches techniques et ressources

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