RTAX2000SL-1LG624V vs RTAX2000SL-LG624V Comparaison
Comparaison détaillée côte à côte de RTAX2000SL-1LG624V par Microchip Technology et RTAX2000SL-LG624V par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX2000SL-1LG624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-1LG624V ✓ ActifMicrochip Technology
RTAX2000SL-LG624V - 2M-Gate Rad-Tolerant FPGA 624-CLGA | Microchip
RTAX2000SL-LG624V ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000SL-1LG624V | RTAX2000SL-LG624V |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9 600,00 | $1 760,00 |
| Logic Cells | 32256 | 32,256 |
| CLBs (Configurable Logic Blocks) | 21504 | — |
| Equivalent Gates | 2000000 (approx.) | — |
| Family | RTAX-S/SL (radiation-tolerant FPGA) | RTAX-SL (RTAX-S/SL RadTolerant FPGAs) |
| Process Variant | SL (super low-power) CMOS | — |
| Core Supply Voltage | 1.5 V (nominal) | 1.5 V (nominal) |
| Température de fonctionnement | -55C to +125C | -55C to +125C |
| Boîtier | 624-terminal ceramic CGA (CG624) | 624-pin CLGA (LG624) |
| Type de montage | Surface Mount (column grid array) | Surface Mount |
| Programming Technology | Anti-fuse, one-time programmable | Antifuse (one-time programmable) |
| Configuration | Live at power-up, single-chip (no external config storage) | — |
| Radiation Tolerance | Radiation-tolerant for space flight systems | Radiation-tolerant (space-flight qualified family) |
| Speed Grade | -1 | — |
| Application Class | Space flight / aerospace | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Embedded Memory | [DATA_NEEDED: embedded SRAM bits] | Embedded SRAM with built-in FIFO control logic |
| Equivalent System Gates | — | 2,000,000 (approx.) |
| Configurable Logic Blocks (CLBs) | — | 21,504 |
| Maximum System Frequency | — | 649 MHz |
| Process Technology | — | 0.15 um CMOS |
| Special Routing Features | — | Segmentable clocks, chip-wide highway routing |
| Power-Up Behavior | — | Live at power-up (no external configuration device) |
| I/O Count | — | [DATA_NEEDED: user I/O count] |