RTAX2000SL-CGS624B vs RTAX2000SL-CGS624E Comparaison
Comparaison détaillée côte à côte de RTAX2000SL-CGS624B par Microchip Technology et RTAX2000SL-CGS624E par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX2000SL-CGS624B - 2M-Gate Rad-Tolerant FPGA, 624-CCGA | Microchip
RTAX2000SL-CGS624B ✓ ActifMicrochip Technology
RTAX2000SL-CGS624E - 2M-Gate Rad-Tolerant FPGA CGA-624 | Microchip
RTAX2000SL-CGS624E ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000SL-CGS624B | RTAX2000SL-CGS624E |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGAs |
| Logic Blocks (CLBs) | 21504 | — |
| Equivalent System Gates | 2000000 | 2000000 gates |
| ASIC Gates | 250000 | — |
| Fréquence d'horloge maximale | 350 MHz | — |
| Process Technology | 0.15 um CMOS | — |
| Tension d'alimentation | 1.5 V | [DATA_NEEDED: core supply voltage] |
| Programming Technology | Anti-fuse (one-time programmable) | — |
| Embedded Memory | Embedded SRAM with FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Boîtier | 624-pin Ceramic Column Grid Array (CCGA) | CBGA624 / CGA-624 ceramic column grid array |
| Type de montage | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | Radiation-tolerant (space-flight grade) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Number of I/Os | [DATA_NEEDED: user I/O count] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Qualification | QML per Mil Prf 38535 family (DLA cross-reference qualified program) | [DATA_NEEDED: QML qualification level] |
| Logic Elements / CLBs | — | 21504 CLBs |
| Additional ASIC Gates | — | 250000 gates |
| Technology | — | CMOS, anti-fuse OTP |
| Configuration | — | Live at power-up, one-time programmable |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Carry logic |
| Maximum I/O | — | [DATA_NEEDED: maximum user I/O count for CG624 package] |