RTAX2000SL-CGS624E vs RTAX2000S-1CGS624EV Comparaison
Comparaison détaillée côte à côte de RTAX2000SL-CGS624E par Microchip Technology et RTAX2000S-1CGS624EV par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX2000SL-CGS624E - 2M-Gate Rad-Tolerant FPGA CGA-624 | Microchip
RTAX2000SL-CGS624E ✓ ActifMicrochip Technology
RTAX2000S-1CGS624EV - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CGS624EV ✓ ActifComparaison des spécifications
| Paramètre | RTAX2000SL-CGS624E | RTAX2000S-1CGS624EV |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $3 600,00 |
| Logic Elements / CLBs | 21504 CLBs | — |
| Equivalent System Gates | 2000000 gates | — |
| Additional ASIC Gates | 250000 gates | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | — |
| Technology | CMOS, anti-fuse OTP | — |
| Radiation Tolerance | Radiation-tolerant (space-flight grade) | — |
| Boîtier | CBGA624 / CGA-624 ceramic column grid array | 624-pin Ceramic Column Grid Array (CGA-624 / CCGA624) |
| Type de montage | Surface Mount | Surface Mount |
| Configuration | Live at power-up, one-time programmable | One-time programmable anti-fuse, live at power-up, single chip |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Tension d'alimentation | [DATA_NEEDED: core supply voltage] | — |
| Maximum I/O | [DATA_NEEDED: maximum user I/O count for CG624 package] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Qualification | [DATA_NEEDED: QML qualification level] | — |
| System Gates | — | 2,000,000 |
| Logic Cells (CLBs) | — | 21504 |
| Total Cells | — | 32256 |
| Additional ASIC Equivalent Gates | — | 250000 |
| Core Supply Voltage | — | 1.5 V nominal (1.425 V to 1.575 V) |
| Process Technology | — | 0.15 um CMOS |
| Maximum Frequency | — | 649 MHz |
| Logic Family | — | CMOS |
| SEU Immunity | — | SEU-hardened registers, immune to single-event upsets to specified LET threshold |
| SEU Rate | — | < 10-10 errors/bit-day |
| Product Family | — | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs |
| Thermal Resistance Basis | — | JEDEC JESD51 simulation conditions (per datasheet) |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O bank voltage] |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |