RTAX250S-LG624EV vs RTAX250S-CG624E Comparaison
Comparaison détaillée côte à côte de RTAX250S-LG624EV par Microchip Technology et RTAX250S-CG624E par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX250S-LG624EV - 250K Gate Rad-Tolerant FPGA | Microchip
RTAX250S-LG624EV ✓ ActifMicrochip Technology
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624E ✓ ActifComparaison des spécifications
| Paramètre | RTAX250S-LG624EV | RTAX250S-CG624E |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Family | RTAX-S Radiation-Tolerant FPGA | RTAX-S radiation-tolerant FPGA |
| Equivalent Gate Count | 250,000 gates | — |
| Logic Cells | 4224 | — |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| User I/Os | 248 | — |
| Core Supply Voltage | 1.5 V nominal | 1.5 V |
| Maximum System Frequency | 649 MHz | — |
| Process Technology | 0.15 um CMOS anti-fuse | 0.15 um CMOS |
| Programming Technology | Anti-fuse (one-time programmable), live at power-up | Antifuse (one-time programmable) |
| Boîtier | 624-pin LGA | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -55C to +125C | -55C to +125C |
| Radiation Tolerance | Radiation-tolerant (space-flight qualified family) | — |
| Application Grade | Space / hi-rel | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Configuration Device Required | No (single-chip, live at power-up) | — |
| System Gates | — | 250000 gates |
| Logic Cells (CLBs) | — | 2816 |
| Maximum Toggle Frequency | — | 649 MHz |
| Logic Family | — | CMOS |
| CLB Combinatorial Delay (max) | — | 0.930 ns |
| Package Type | — | CCGA-624 (ceramic column grid array, 624 pins) |
| SEU Hardening | — | SEU-hardened registers, no external TMR required |
| SEU Immunity | — | Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day |
| Power-Up Behavior | — | Live at power-up (true single-chip) |
| Target Application | — | Space-flight systems |