RTAX250SL-CG624E vs RTAX250SL-1LG624V Comparaison
Comparaison détaillée côte à côte de RTAX250SL-CG624E par Microchip Technology et RTAX250SL-1LG624V par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-CG624E ✓ ActifMicrochip Technology
RTAX250SL-1LG624V - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-1LG624V ✓ ActifComparaison des spécifications
| Paramètre | RTAX250SL-CG624E | RTAX250SL-1LG624V |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 375,00 | $950,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| System Gates | 250000 | — |
| Logic Cells (CLBs) | 2816 | — |
| Maximum Frequency | 649 MHz | — |
| Process Technology | 0.15 um CMOS | — |
| Core Supply Voltage | 1.5 V | 1.5 V nominal |
| Supply Voltage Tolerance | +/-0.15 V | — |
| Maximum Combinatorial Delay | 0.93 ns | — |
| Boîtier | 624-Pin CCGA (Ceramic Column Grid Array) | 624-terminal ceramic CGA (LG624), 1.270 mm terminal pitch |
| Température de fonctionnement | -55C to +125C | -55C to +125C |
| Logic Family | CMOS | — |
| Radiation Tolerance | SEU-hardened registers; SEU rate < 10-10 errors/bit-day | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programmability | Live at power-up, true single-chip | — |
| Equivalent System Gates | — | 250,000 gates |
| Logic Cells | — | 4224 |
| Configurable Logic Blocks (CLBs) | — | 2816 |
| Architecture | — | CMOS antifuse (Axcelerator-derived) |
| Speed Grade | — | -1 |
| Configuration Type | — | One-Time Programmable (antifuse) |
| Clock Resources | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| Application Domain | — | Space-flight systems |
| Total Ionizing Dose Tolerance | — | [DATA_NEEDED: TID level] |