RTAX4000SL-LG1272V vs RTAX4000SL-1LG1272PROTO Comparaison
Comparaison détaillée côte à côte de RTAX4000SL-LG1272V par Microchip Technology et RTAX4000SL-1LG1272PROTO par Microchip Technology. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Microchip Technology
RTAX4000SL-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-LG1272V ✓ ActifMicrochip Technology
RTAX4000SL-1LG1272PROTO - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-1LG1272PROTO ✓ ActifComparaison des spécifications
| Paramètre | RTAX4000SL-LG1272V | RTAX4000SL-1LG1272PROTO |
|---|---|---|
| Marque | Microchip Technology | Microchip Technology |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Logic Cells | 60480 | 60,480 |
| CLBs | 40320 | — |
| Equivalent System Gates | 4000000 | 4,000,000 |
| Family | RTAX-S/SL and RTAX-DSP | RTAX-S/SL Radiation-Tolerant FPGAs |
| Programming Technology | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant, space-flight grade | — |
| Power-Up Mode | Live at power-up (LAPU) | — |
| Form Factor | True single-chip | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clocking | Segmentable clocks | Segmentable chip-wide clocks |
| Routing | Chip-wide highway routing, carry logic | — |
| Base Architecture | Microsemi Axcelerator commercial family | — |
| Boîtier | 1272-pin ceramic LG (CGA) package | 1272-terminal column grid array (LG1272) |
| Type de montage | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | Space-flight systems |
| Statut RoHS | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS status] |
| Température de fonctionnement | [DATA_NEEDED: Operating Temperature] | — |
| Core Voltage | [DATA_NEEDED: Core Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded SRAM Bits | [DATA_NEEDED: Embedded SRAM Bits] | — |
| Logic Blocks (CLBs) | — | 40,320 |
| Technology | — | CMOS, antifuse (one-time programmable) |
| Terminal Pitch | — | 1.000 mm |
| Speed Grade | — | -1 (SL) |
| Qualification Flow | — | PROTO (prototype flow) |
| Configuration | — | Live at power-up, no external configuration device |
| Tension d'alimentation | — | [DATA_NEEDED: core supply voltage] |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Number of User I/O | — | [DATA_NEEDED: user I/O count] |
| Total Dissipation | — | [DATA_NEEDED: typical power dissipation] |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |