SI5345A-D-GMR vs SI5345B-D-GM Comparaison
Comparaison détaillée côte à côte de SI5345A-D-GMR par Skyworks Solutions et SI5345B-D-GM par Skyworks Solutions. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Skyworks Solutions
SI5345A-D-GMR - 10-Output Jitter Attenuator | Skyworks | 1028 MHz
SI5345A-D-GMR ✓ ActifComparaison des spécifications
| Paramètre | SI5345A-D-GMR | SI5345B-D-GM |
|---|---|---|
| Marque | Skyworks Solutions | Skyworks Solutions |
| Catégorie | Clock & Timing | Clock & Timing |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,75 | $8,55 |
| Product Type | Clock Multiplier / Jitter Attenuator | — |
| Series | Si5345 (Si5345A variant, Rev D) | — |
| Nombre de sorties | 10 | 10 |
| Output Frequency Range | 0.001 MHz to 1028 MHz | 0.001 MHz to 350 MHz |
| Input Frequency Range | 0.008 MHz to 750 MHz | — |
| RMS Jitter (12 kHz-20 MHz) | 1.5 ps max (typ < 200 fs) | — |
| Output Logic Levels | LVPECL, LVDS, HCSL, LVCMOS, CML (per-pin selectable) | — |
| PLL Technology | DSPLL (4th-gen) + MultiSynth fractional divider | — |
| Programming Interface | I2C / SPI (selectable) | — |
| Non-Volatile Memory | Yes (in-circuit programmable) | — |
| Boîtier | 64-pin QFN (9x9 mm) with exposed pad | 64-pin QFN Exposed Pad (9x9 mm) |
| Type de montage | Surface Mount | Surface Mount |
| Tension d'alimentation | 1.8 V core, 3.3 V I/O (typical) | 1.8 V / 3.3 V (core / IO) |
| Température de fonctionnement | -40 C to +85 C | — |
| Niveau MSL | 3 | [DATA_NEEDED: MSL level] |
| Statut RoHS | Compliant | Compliant |
| Configuration Tool | ClockBuilder Pro (Skyworks / Silicon Labs) | — |
| Fonction | — | 10-channel any-frequency jitter attenuator / clock multiplier |
| Phase Jitter (RMS, typical) | — | 0.09 ps |
| Reference Input Frequency Range | — | [DATA_NEEDED: reference input frequency range] |
| Output Logic Formats | — | LVCMOS, LVDS, LVPECL, HCSL, CML |
| Control Interface | — | I2C / SPI (serial) |
| On-chip NVM | — | Yes (in-circuit programmable, powers up configured) |
| Jitter Attenuation Bandwidth | — | Digitally programmable |
| Technology | — | DSPLL (4th gen) + MultiSynth fractional dividers |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |