STM32F746IGT6 vs STM32F746IGK7 Comparaison
Comparaison détaillée côte à côte de STM32F746IGT6 par STMicroelectronics et STM32F746IGK7 par STMicroelectronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | STM32F746IGT6 | STM32F746IGK7 |
|---|---|---|
| Marque | STMicroelectronics | STMicroelectronics |
| Catégorie | Microcontrollers | Microcontrollers |
| Statut du cycle de vie | Actif | Actif |
| Core Architecture | ARM Cortex-M7 32-bit RISC | — |
| Fréquence d'horloge maximale | 216 MHz | — |
| FPU | Double-precision IEEE 754 | — |
| L1 Cache | 16 KB I-cache + 16 KB D-cache | — |
| Program Memory | 1 MB Flash | — |
| SRAM | 340 KB total (256 KB SRAM1/SRAM2 + 64 KB CCM SRAM + 16 KB DTCM-RAM + 4 KB backup SRAM) | — |
| Tension d'alimentation | 1.8 V / 2.5 V / 3.3 V | — |
| Plage de température de fonctionnement | -40 C to +85 C (industrial grade -6 suffix) | [DATA_NEEDED: operating temperature range] |
| Boîtier | 176-pin LQFP (24x24 mm, 0.5 mm pitch) | 176+25 UFBGA (10x10) |
| ADC | 3x 12-bit, 2.4 MSPS, 24 channels | — |
| DAC | 2x 12-bit | — |
| Communication Interfaces | USB OTG FS+HS, 10/100 Ethernet MAC, 3x CAN 2.0B, 6x USART/UART, 6x SPI, 3x I2C, 2x SDMMC, 1x CAN, 1x SPDIF-RX | — |
| Display Controller | LCD-TFT controller up to XGA resolution with Chrom-ART accelerator | — |
| Camera Interface | 8- to 14-bit parallel, up to 54 MB/s | — |
| Crypto Hardware | AES-128/192/256, Triple-DES, SHA-1/MD5, TRNG | — |
| Timers | 12x 16-bit, 2x 32-bit | — |
| DMA | 2x DMA controllers, 16 streams total | — |
| GPIO | Up to 140 I/O | — |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Product Type | — | 32-bit Arm Cortex-M7 microcontroller |
| Manufacturer | — | STMicroelectronics |
| CPU Core | — | Arm Cortex-M7 |
| Instruction Set | — | 32-bit RISC |
| Maximum CPU Frequency | — | 216 MHz |
| Core Configuration | — | Single-core |
| Flash Memory | — | 1 MB (1M x 8) |
| DSP and FPU Support | — | DSP and floating-point unit |
| Cache | — | L1 cache |
| External Memory Interfaces | — | SDRAM support |
| Display Support | — | TFT support |
| Hardware Acceleration | — | Art Accelerator |
| Type de montage | — | Surface mount ball-grid array |
| Package Body Size | — | 10 mm x 10 mm |
| Number of Device Balls | — | 176 balls plus 25 additional balls |
| RAM Capacity | — | [DATA_NEEDED: RAM capacity] |
| Operating Voltage Range | — | [DATA_NEEDED: operating voltage range] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Status | — | [DATA_NEEDED: AEC-Q100 qualification status] |