XC3090L-8PCG84C vs XC3090L-100PC84C Comparaison
Comparaison détaillée côte à côte de XC3090L-8PCG84C par Xilinx et XC3090L-100PC84C par Xilinx. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | XC3090L-8PCG84C | XC3090L-100PC84C |
|---|---|---|
| Marque | Xilinx | Xilinx |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $26,10 | $15,20 |
| Family | XC3000A/L Series FPGA | XC3000 |
| Logic Cells / CLBs | 70 Configurable Logic Blocks | 320 Configurable Logic Blocks |
| Gate Count | 6,400 gates (typical) | — |
| Configuration Program Store | 64,160 bits | — |
| User I/O Pins | 70 (maximum) | — |
| Boîtier | 84-pin PLCC (J-Lead, PCG84) | 84-pin PLCC (PC84) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (low-voltage 'L' variant) | — |
| Speed Grade | -8 (moderate) | -100 |
| Température de fonctionnement | 0 C to +70 C (commercial 'C' suffix) | Commercial (0C to +70C) |
| Configuration Modes | Serial master/slave, parallel master/slave, peripheral mode | — |
| Process Technology | [DATA_NEEDED: process node] | CMOS, 5 micron |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Configuration Clock Range | [DATA_NEEDED: CCLK frequency range] | — |
| Type de montage | Surface Mount (PLCC J-Lead) | Through-Hole / Socket (PLCC) |
| Statut RoHS | unknown | [DATA_NEEDED: rohs_status] |
| Lead-Free | unknown | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: msl_level] |
| Programming Technology | SRAM-based, in-system reconfigurable | — |
| Series | — | XC3090L (Low Power) |
| Gate Count (typical) | — | 5,000 to 6,000 gates |
| Maximum Operating Frequency | — | 100 MHz |
| Tension d'alimentation | — | 5 V |
| Package Code | — | PC84C |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Configuration Method | — | Xilinx XACT bitstream |
| Lead Free | — | [DATA_NEEDED: lead_free] |