XC6SLX4-2CSG225C vs XC6SLX4-2CSG225I Comparaison
Comparaison détaillée côte à côte de XC6SLX4-2CSG225C par AMD et XC6SLX4-2CSG225I par AMD. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | XC6SLX4-2CSG225C | XC6SLX4-2CSG225I |
|---|---|---|
| Marque | AMD | AMD |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Unknown |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $0,00 |
| Device Type | Field Programmable Gate Array (FPGA) | Spartan-6 LX field-programmable gate array (FPGA) |
| FPGA Family | Spartan-6 LX | — |
| Logic Cells | 3840 cells | 3,840 cells |
| User I/O | 132 I/O | — |
| Boîtier | 225-CSBGA / 225-LFBGA CSPBGA | 225-CSBGA |
| Package Pin Count | 225 pins | — |
| Process Technology | 45 nm CMOS | — |
| Speed Grade | -2 | -2 |
| Temperature Grade | C | Industrial |
| Product Family | Spartan-6 | — |
| Programming Technology | FPGA configuration memory | — |
| Logic Architecture | Configurable digital logic | — |
| I/O Count Source | 132 I/O | — |
| Lead-Free Status | Lead Free | — |
| Statut RoHS | RoHS Compliant | [DATA_NEEDED: RoHS status] |
| Core Voltage | 1.2 V | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Block RAM | [DATA_NEEDED: block RAM resources] | [DATA_NEEDED: Block RAM capacity] |
| DSP Resources | [DATA_NEEDED: DSP resources] | — |
| Clock Management Resources | [DATA_NEEDED: clock management resources] | — |
| I/O Standards | [DATA_NEEDED: supported I/O standards] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| Pinout | [DATA_NEEDED: complete package pinout] | — |
| Pricing | [DATA_NEEDED: verified quantity pricing] | — |
| I/O Count | — | 132 I/O |
| Maximum Stated Frequency | — | 375 MHz |
| Technology | — | 45 nm CMOS |
| Operating Voltage | — | 1.14 V to 1.26 V |
| Package Designation | — | CSG225 |
| Programmable Logic Resource | — | 3,840 logic cells |
| Digital Clock Manager | — | DCM resource identified in product data |
| Phase-Locked Loop | — | PLL resource identified in product data |
| Type de montage | — | Surface mount |
| DSP Slices | — | [DATA_NEEDED: DSP slice count] |
| Plage de température de fonctionnement | — | [DATA_NEEDED: Operating temperature range] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |