XC6SLX45-3FG484I vs XC6SLX45-2FG484C Comparaison
Comparaison détaillée côte à côte de XC6SLX45-3FG484I par AMD et XC6SLX45-2FG484C par AMD. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | XC6SLX45-3FG484I | XC6SLX45-2FG484C |
|---|---|---|
| Marque | AMD | AMD |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Device Type | Field Programmable Gate Array (FPGA) | Spartan-6 LX field-programmable gate array (FPGA) |
| FPGA Family | Spartan-6 LX | — |
| Number of I/O | 316 I/O | — |
| Internal Frequency | 500 MHz | 500 MHz |
| Speed Grade | -3 | -2 |
| Temperature Grade | Industrial | Commercial (C) |
| Température de fonctionnement | 0 C to 85 C | 0°C to 85°C |
| Package Type | 484-BBGA | — |
| Package Dimensions | 15 x 15 mm | 15 x 15 mm |
| Ball Pitch | 0.80 mm | 0.80 mm |
| Package Ball Count | 324 balls | — |
| Package Outline | MO-275 | — |
| Type de montage | Surface Mount | — |
| Lead-Free Status | Lead Free | — |
| Logic Resource Count | [DATA_NEEDED: logic cell count] | — |
| Block RAM Capacity | [DATA_NEEDED: block RAM capacity] | — |
| DSP Slice Count | [DATA_NEEDED: DSP slice count] | — |
| Supply Voltage Range | [DATA_NEEDED: supply voltage range] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification status] | — |
| Logic Elements | — | 43,661 LE |
| Adaptive Logic Modules | — | 6,822 ALM |
| Embedded Memory | — | 2.04 Mbit |
| I/O Sites | — | 316 I/O |
| Package Pins | — | 484 pins |
| Boîtier | — | 484-pin FBGA, 15 x 15 mm, 0.80 mm pitch |
| Process Technology | — | 45 nm CMOS |
| Core Supply Voltage | — | 1.2 V |
| Logic Architecture | — | Adaptive Logic Module (ALM) FPGA |
| Programming Memory | — | [DATA_NEEDED: configuration memory type and capacity] |
| Fréquence d'horloge maximale | — | [DATA_NEEDED: maximum user clock frequency] |
| I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| Lead-Free Termination | — | Lead-free package |