XC7A12T-2CSG325I vs XA7A12T-2CSG325I Comparaison
Comparaison détaillée côte à côte de XC7A12T-2CSG325I par AMD et XA7A12T-2CSG325I par AMD. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | XC7A12T-2CSG325I | XA7A12T-2CSG325I |
|---|---|---|
| Marque | AMD | AMD |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Device Type | Artix-7 FPGA | — |
| Logic Cells | 12,800 cells | 12800 |
| User I/O | 150 I/Os | 150 |
| Configuration Memory | 737,280 bits | — |
| Performance Grade | -2 | — |
| Process Technology | 28 nm HKMG HPL | — |
| Boîtier | 324-LFBGA CSBGA | 324-LFBGA, CSPBGA (CSG325) |
| Package Type | CSPBGA | — |
| Type de montage | Surface Mount | — |
| Programmable Logic Type | FPGA | — |
| Product Family | Artix-7 | — |
| Number of Logic Cells | 12,800 cells | — |
| Number of User I/Os | 150 I/Os | — |
| Silicon Technology | 28 nm HKMG HPL process | — |
| Statut RoHS | Compliant | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Supply Voltage Range | [DATA_NEEDED: core and I/O supply voltage ranges] | — |
| Block RAM Capacity | [DATA_NEEDED: block RAM capacity] | — |
| DSP Slice Count | [DATA_NEEDED: DSP slice count] | — |
| Fréquence d'horloge maximale | [DATA_NEEDED: maximum clock frequency] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| Family | — | Artix-7 XA (Automotive) |
| Configurable Logic Blocks (Slices) | — | 2000 |
| Distributed RAM | — | 125 Kb |
| DSP48E1 Slices | — | 40 |
| Block RAM Blocks | — | 20 x 36 Kb |
| Total Block RAM | — | 737280 bits |
| Speed Grade | — | -2 |
| Core Supply Voltage (VCCINT) | — | 1.0 V |
| I/O Voltage Range (HR Banks) | — | 1.2 V to 3.3 V |
| Operating Temperature (Tj) | — | -40 C to +100 C (Industrial) |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 |
| Peak Reflow Temperature | — | 260 C |
| Maximum Time at Peak Reflow | — | 30 s |
| Terminal Finish | — | Tin/Silver/Copper (JESD-609 e1) |
| Automotive Qualification | — | AEC-Q100 (XA flow) |
| Configuration Modes | — | Master SPI, Master BPI, Slave SelectMAP, Slave Serial, JTAG |