ADC0804LCN - 8-Bit µP Compatible SAR ADC | Texas Instruments
Référence : ADC0804LCN ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $5.95 | $5,95 |
| 10 | $5.36 | $53,60 |
| 100 | $4.78 | $478,00 |
| 500 | $4.3 | $2 150,00 |
| 1 000 | $3.84 | $3 840,00 |
ADC0804LCN Présentation
What is a SAR ADC? A successive-approximation register (SAR) ADC is a type of analog-to-digital converter that resolves one bit per clock cycle using a binary-search algorithm against an internal precision DAC. SAR ADCs occupy the middle of the converter hierarchy: slower than flash ADCs but more accurate per LSB, faster than sigma-delta ADCs at the same resolution. They are the workhorse choice for 8-16 bit, 1 MSPS-class data acquisition in microprocessorbased systems where deterministic latency and ease of digital interfacing matter more than raw speed.
Key features include 0 V to 5 V analog input range with single-ended or pseudo-differential operation, on-chip track/hold, three-state outputs designed for direct 8080 / 6800 / generic microprocessor bus interface, and a low typical ICC of 1.9 mA at 25 °C with CS = 5 V. The CS input is assumed to bracket the WR strobe input, so timing is dependent on the WR pulse width. The 20-pin PDIP format makes the LCN variant well suited to through-hole prototyping, educational boards, and replacement of legacy sockets.
Typical applications include 8-bit data loggers, process-control front ends, digital-panel-meter replacements, microcontroller analog-input expansion, and legacy industrial system upgrades. The wide operating temperature range of -40 °C to +85 °C supports industrial control environments, and the device remains in production for replacement of mature designs. The LCN suffix denotes the 20-pin plastic DIP industrial temperature version.
When laying out the ADC0804LCN, place the analog input and VREF decoupling capacitors as close as possible to the analog pins and isolate analog ground from digital ground at a single point under the part. The internal clock frees the designer from crystal selection but the external CLK R / CLK RC components must be chosen to keep the conversion rate around 640 kHz for the LC version. Designers should remember that ADC0804 is the active-High RD variant; ADC0803 is identical except for an active-Low RD output polarity.
This page synthesizes distributor pricing, drop-in alternatives from the ADC0801/02/03/04/05 family, design trade-offs and practical PCB layout guidance not found on any single distributor page. Cross-brand pin-compatible drop-ins are flagged with manufacturer source.
Alternatives de remplacement direct pour ADC0804LCN — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec ADC0804LCN (même facteur de forme et même empreinte) — différant par Operating Temperature, Package, Mounting Type, Conversion Time, Input Type.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
ADC0803LCN
✅ Remplacement direct✓ En stock
$4.37 / unité
Voir la fiche technique →ADC0802LCN
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
ADC0801LCN
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
ADC0805LCN
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
ADC0804LCN
✅ Remplacement direct✓ En stock
$3.84 / unité
Voir la fiche technique →ADC0804LCN Valeurs maximales et caractéristiques électriques
| Résolution | 8 bit |
| Number of Channels | 1 |
| Input Type | Differential (single-ended capable) |
| Converter Architecture | SAR (Successive Approximation) |
| Analog Supply Voltage | 4.5 V to 6.5 V (single +5 V typical) |
| Digital Supply Voltage | Same as VCC (no separate DVCC) |
| Full-Scale Input Range | 0 V to 5 V (with VREF/2 = 2.5 V) |
| Reference Input | VREF/2 pin, sets full-scale span |
| INL (Non-linéarité intégrale) | ±1 LSB (max) |
| DNL (Differential Nonlinearity) | ±1 LSB (max) |
| Conversion Time | 110 µs typical at fCLK = 640 kHz |
| Conversion Rate | Up to ~10 kSPS (typical application clock) |
| Supply Current (ICC) | 1.9 mA typ at 25 °C, CS=5V (LCN/LCWM) |
| Digital Interface | Three-state parallel bus, RD/WR strobes, CS |
| On-Chip Clock Generator | Yes (external R or R + C) |
| Température de fonctionnement | -40 °C to +85 °C |
| Boîtier | 20-pin PDIP (N) |
| Type de montage | Through-hole |
Configuration des broches de ADC0804LCN
| Broche 1 | CS — Chip Select - active high; gates RD and WR |
| Broche 2 | RD — Read strobe - active high on ADC0804 (active low on ADC0803) |
| Broche 3 | WR — Write strobe - active low; initiates conversion |
| Broche 4 | CLK IN — External clock input (internal clock also available) |
| Broche 5 | INTR — Interrupt output - goes high at end of conversion |
| Broche 6 | VIN(+) — Non-inverting analog input |
| Broche 7 | VIN(-) — Inverting analog input (pseudo-differential reference) |
| Broche 8 | AGND — Analog ground |
| Broche 9 | VREF/2 — Reference input - sets full-scale span (2.5 V gives 0-5 V input) |
| Broche 10 | DGND — Digital ground |
| Broche 11 | DB0 — Data bit 0 (LSB) |
| Broche 12 | DB1 — Data bit 1 |
| Broche 13 | DB2 — Data bit 2 |
| Broche 14 | DB3 — Data bit 3 |
| Broche 15 | DB4 — Data bit 4 |
| Broche 16 | DB5 — Data bit 5 |
| Broche 17 | DB6 — Data bit 6 |
| Broche 18 | DB7 — Data bit 7 (MSB) |
| Broche 19 | CLK R — Clock RC timing resistor pin (internal clock mode) |
| Broche 20 | VCC — +5 V analog + digital supply |
Applications typiques
ADC0804LCN convient pour 6 applications: Industrial Process Control Front End, Digital Panel Meter Replacement, Microcontroller Analog Input Expansion, Data Logger Signal Conditioning, Educational Lab Trainer Boards, Legacy Industrial System Upgrade.
Industrial Process Control Front End
The ADC0804LCN fits industrial process-control front ends because its 0-5 V analog input range directly digitizes 4-20 mA-loop derived voltages after a single op-amp gain stage, and the on-chip clock generator removes the need for an external crystal in noisy factory environments. With ±1 LSB INL and a 110 µs conversion time at 640 kHz fCLK, it provides the deterministic latency required by 8-bit PLC analog-input cards and SCADA remote-terminal units. The 20-pin PDIP format remains preferred for through-hole control boards where field-serviceability is critical, and the device's three-state parallel bus maps cleanly to legacy 8051-style industrial microcontrollers.
Recommandé
Digital Panel Meter Replacement
The ADC0804LCN is widely used as a digital panel meter (DPM) replacement because its 8-bit resolution over a 0-5 V input gives 19.6 mV per LSB - more than enough resolution to display 0-199.9 mV, 0-1.999 V or 0-19.99 V ranges when paired with an external input attenuator. The on-chip clock generator and differential analog inputs simplify the front-end so the entire panel meter fits on a 5 V-only supply with an LCD driver and a single reference. Designers can reuse the ADC0803LCN drop-in variant when the host firmware expects an active-LOW RD strobe.
Recommandé
Microcontroller Analog Input Expansion
The ADC0804LCN expands the analog-input count of legacy 8051, 68HC11 or PIC microcontrollers that lack on-chip ADCs or need a higher-channel-count front end. Its three-state parallel bus connects directly to the external memory bus of the host CPU and the INTR output acts as an interrupt to signal conversion-complete, so firmware overhead stays minimal. With a 9 kSPS effective sample rate the ADC0804LCN handles slow sensor channels such as thermocouple amplifiers, photodiode transimpedance amplifiers and strain-gauge bridges in instrumentation products.
Recommandé
Data Logger Signal Conditioning
Portable 8-bit data loggers for temperature, humidity and battery-voltage monitoring use the ADC0804LCN because of its 1.9 mA typical supply current and 5 V single-supply operation, which extends battery life in unattended field deployments. The differential analog input lets designers tie VIN(-) to a mid-rail reference for bipolar signals, and the on-chip sample-and-hold captures fast transient events such as switch-closure bounce without an external track/hold IC. The 20-pin PDIP package is also easy to swap in the field during service calls to remote telemetry units.
Recommandé
Educational Lab Trainer Boards
University EE labs and embedded-systems training kits use the ADC0804LCN because the through-hole 20-pin PDIP is breadboard-friendly and lets students probe every analog and digital pin with an oscilloscope. The device's separate VIN(+) and VIN(-) inputs teach differential sampling, while the RD/WR/INTR trio introduces microprocessor-bus handshaking concepts. Its ±1 LSB INL is good enough for illustrative lab exercises on quantization error, and the ADC0803LCN variant lets instructors discuss active-HIGH vs active-LOW strobe polarity without changing hardware.
Recommandé
Legacy Industrial System Upgrade
The ADC0804LCN keeps older 8080-, 8085- and 68HC11-based industrial controllers in service because it is one of the few ADCs that drop into the original 20-pin PDIP socket with identical timing. Field-replacement boards can be assembled using the same PCB footprint, and firmware rarely needs changes since the three-state bus interface matches the original Intel/Motorola bus protocol. The licensed TI die is also sold as the Renesas ADC0804LCN, providing a second source for long-life industrial programs that need 10-15 year parts continuity.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour ADC0804LCN — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | ADC0803LCN | ADC0802LCN | ADC0801LCN | ADC0805LCN | ADC0804LCN (Renesas) |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Renesas Electronics Corporation |
| Package | 20-PDIP (N) | 20-PDIP (N) - same | 20-PDIP (N) - same | 20-PDIP (N) - same | 20-PDIP (N) - same | 20-PDIP (N) - same |
| Resolution | 8 bit | 8 bit | 8 bit | 8 bit | 8 bit | 8 bit |
| RD Strobe Polarity | Active HIGH (ADC0804) | Active LOW | Active HIGH | Active HIGH | Active HIGH | Active HIGH |
| On-Chip Zero/Full-Scale Adjust | Full-scale trim only (no zero adjust) | Full-scale trim only | None | None | None | Full-scale trim only |
| Analog Input | Single-ended or pseudo-differential | Single-ended or pseudo-differential | Single-ended or pseudo-differential | Single-ended or pseudo-differential | True differential | Single-ended or pseudo-differential |
| INL (max) | ±1 LSB | ±1 LSB | ±2 LSB | ±1 LSB | ±1 LSB | ±1 LSB |
| Conversion Time (typ) | 110 µs | 110 µs | 110 µs | 110 µs | 110 µs | 110 µs |
Principaux différenciateurs
- Pin-to-pin second source via licensed die (vs ADC0804LCN (Renesas))
- On-chip clock generator eliminates crystal cost (vs Discrete crystal + external counter design)
- Differential input allows bipolar signals without level shift (vs Single-ended 8-bit ADCs of the same era)
Notes de conception
Place 10 µF and 0.1 µF decoupling capacitors on VCC (pin 20) as close to the IC as possible, with the 0.1 µF cap leading directly to the AGND/DGND plane tie-point. The ADC0804LCN shares VCC for analog and digital supplies, so a single ferrite bead or 10 Ω resistor between the analog VCC rail and the digital VCC rail can break ground-loop noise from switching logic, per the TI ADC080x datasheet typical-application circuit.
The CS input is assumed to bracket the WR strobe input - timing is dependent on the WR pulse width. Keep the WR pulse shorter than one conversion cycle (≈110 µs) and ensure CS is stable around the WR edge; otherwise the conversion-start state machine can latch incorrectly. When running at 8051-grade 12 MHz, gate WR with a simple wait-state so CS and WR transition together.
Do not leave VREF/2 floating when you want a 0-5 V input span - even though the datasheet labels it NC for some operating modes, omitting the decoupling cap on VREF/2 introduces 1-2 LSB noise into the conversion. Use a 2.5 V reference from a TL431ACDBZR plus 0.1 µF + 10 µF decoupling, and route VREF/2 on a low-impedance trace. Also tie VIN(-) to AGND (not DGND) when using single-ended mode to avoid digital switching noise coupling into the input ladder.
Estimated: at +5 V VCC, 1.9 mA ICC and 110 µs conversion time, the ADC0804LCN dissipates roughly 9.5 mW continuous, well below the 20-pin PDIP thermal limit of ~600 mW at 25 °C. No heatsink is required, but operating above 70 °C ambient reduces INL by ~0.5 LSB - keep the part away from digital heat-sources on the PCB.
Informations de conformité
RoHS status and lead-free status of the LCN (20-PDIP) variant were not explicitly listed in the verified web data and are marked unknown. AEC-Q100 is not applicable for this through-hole industrial-grade part. The die is manufactured on a legacy CMOS process; conflict-minerals declaration is available from TI on the product page.
