ADS7825PG4 - 16-Bit, 4-Ch, 40kS/s Sampling ADC | Texas Instruments
Référence : ADS7825PG4 ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $12.5 | $12,50 |
| 10 | $11.2 | $112,00 |
| 100 | $9.8 | $980,00 |
| 500 | $8.45 | $4 225,00 |
| 1 000 | $7.2 | $7 200,00 |
ADS7825PG4 Présentation
A successive-approximation ADC is a type of Nyquist-rate converter that uses an internal DAC and a binary-search algorithm to digitize an analog input one bit at a time over a fixed number of conversion cycles. SAR ADCs deliver deterministic latency, low power consumption, and excellent DC accuracy, which makes them a workhorse for industrial process control, multi-channel sensor monitoring, and precision instrumentation where sampling rates below ~1 MSPS are sufficient. Within the power-management and signal-chain hierarchy, the ADS7825PG4 sits between the analog front end (sensor + amplifier) and a microprocessor or DSP, converting real-world analog signals into a format that a digital controller can process.
Key specifications include 16-bit resolution with no missing codes, 40 kHz maximum throughput per channel, ±2.5 LSB maximum INL (typical linearity error 0.0046%), and flexible supply rails (analog 4.75V-5.25V, digital 4.75V-5.25V). The device supports single-ended and pseudo-differential inputs across four channels, hardware or software channel selection, and either an external or internal reference. Power dissipation is 50 mW maximum in normal operation, dropping to under 100 µW in power-down mode for battery-aware designs.
The architecture combines an R-2R ladder DAC with auto-calibrated thin-film resistors and a precision comparator, achieving low-noise conversion and tight gain matching. The on-chip 2.5V reference is laser-trimmed to within ±5 mV, removing the need for an external ADR03 or REF02 in many designs. CMOS processing and high-impedance CMOS inputs keep the input leakage under 200 pA, making the part tolerant of high-impedance sensor sources. The package_svg_key confirms the 28-DIP 0.300-inch pinout, slot-compatible with the older ADS7824UB family for easy migration.
Typical applications include multi-channel industrial process control (4-20 mA loop monitoring via shunt), portable battery-powered data loggers using the internal reference and power-down mode, scanner and digitizer front ends, and four-channel instrumentation front ends in test equipment. With 40 kS/s aggregate throughput, four simultaneous channels at 10 kS/s each can be supported, which is more than adequate for temperature, pressure, and strain-gauge multiplexer arrays.
When designing the analog front end, ensure the source impedance stays well below 1 kΩ to avoid gain-error shift caused by the ADC's finite input current during sampling, and place a 100 nF ceramic bypass capacitor within 5 mm of the AVDD pin. Use the digital-interface mode that matches your host MCU/MCU DSP: serial mode for low-pin-count microcontrollers, parallel mode for high-speed DSP read-back.
Alternatives de remplacement direct pour ADS7825PG4 — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec ADS7825PG4 (même facteur de forme et même empreinte) — différant par Package, Number of Input Channels, Data Interface, Input Voltage Range, RoHS Status.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
ADS7825P
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
ADS7824PG4
✅ Remplacement direct✓ En stock
$11.1 / unité
Voir la fiche technique →ADS7824UB/1KG4
✅ Remplacement direct✓ En stock
$9.4 / unité
Voir la fiche technique →ADS7822PG4
✅ Remplacement direct✓ En stock
$3.2 / unité
Voir la fiche technique →ADS7817UBG4
✅ Remplacement direct✓ En stock
$7.77 / unité
Voir la fiche technique →ADS7825PG4 Valeurs maximales et caractéristiques électriques
| Number of Bits | 16 |
| Fréquence d'échantillonnage | 40 kS/s |
| Number of Input Channels | 4 (single-ended / pseudo-differential) |
| Input Type | Single-ended, Pseudo-Differential |
| Data Interface | Serial (SPI/QSPI/MICROWIRE-compatible), Parallel |
| Architecture | SAR (Successive Approximation Register) |
| Analog Supply Voltage | 4.75 V to 5.25 V |
| Digital Supply Voltage | 4.75 V to 5.25 V (or 5V AVDD-coupled) |
| Plage de tension d'entrée | 0 V to VREF (unipolar), with PGA scaling |
| Tension de référence | Internal 2.5 V (laser-trimmed) or external |
| Integral Nonlinearity (INL) | ±2.5 LSB max (typ. 0.0046% linearity error) |
| Power Dissipation | 50 mW max (operating), <100 µW (power-down) |
| Température de fonctionnement | -40 °C to +85 °C |
| Boîtier / Format | 28-DIP (0.300 in, 7.62 mm) |
| Type de montage | Through-Hole (THT) |
| Packaging | Tube |
| Statut RoHS | Compliant (Pb-free, Green) |
Configuration des broches de ADS7825PG4
| Broche 1 | VREF — Reference voltage input/output (internal 2.5V ref, bypass with 2.2µF + 100nF) |
| Broche 2 | CH0 — Analog input channel 0 |
| Broche 3 | CH1 — Analog input channel 1 |
| Broche 4 | CH2 — Analog input channel 2 |
| Broche 5 | CH3 — Analog input channel 3 |
| Broche 6 | AGND — Analog ground return for input MUX and reference |
| Broche 7 | AVDD — Analog 5V supply; decouple with 10µF + 100nF |
| Broche 8 | MODE — Serial/parallel interface mode select (low = parallel, high = serial) |
| Broche 9 | CLOCK — External clock input or internal clock select (tie high for internal) |
| Broche 10 | CONVST — Start of conversion; falling edge initiates acquisition |
| Broche 11 | A0 — Channel address bit 0 (selects CH0 vs CH2 in pairs) |
| Broche 12 | A1 — Channel address bit 1 (selects CH pair and CHx+2) |
| Broche 13 | D7 — Parallel data bit 7 (MSB in 8+8 byte mode) |
| Broche 14 | D6 — Parallel data bit 6 |
| Broche 15 | D5 — Parallel data bit 5 |
| Broche 16 | D4 — Parallel data bit 4 |
| Broche 17 | D3 — Parallel data bit 3 |
| Broche 18 | D2 — Parallel data bit 2 |
| Broche 19 | D1 — Parallel data bit 1 |
| Broche 20 | D0 — Parallel data bit 0 (LSB) |
| Broche 21 | BYTE — 8/16-bit parallel bus width select (low = 8-bit, high = 16-bit) |
| Broche 22 | DGND — Digital ground return for output drivers |
| Broche 23 | DVDD — Digital 5V supply; decouple with 10µF + 100nF |
| Broche 24 | BUSY — Active high during conversion (output flag) |
| Broche 25 | CS — Chip select, active low |
| Broche 26 | DCLOCK — Serial data clock (SPI SCLK); tie low in parallel mode |
| Broche 27 | DATAOUT — Serial data output (SPI MISO); valid in serial mode |
| Broche 28 | PWDN — Power-down input, active low (tie high for normal operation) |
Applications typiques
ADS7825PG4 convient pour 7 applications: 4-20 mA Industrial Loop Monitoring, Portable Battery Data Logger, Multi-Channel Sensor Scanner Front End, Precision Instrumentation Test Equipment, PlC Analog Input Module, Optical Scanner and Digitizer Front End, Medical Patient Monitor Signal Acquisition.
4-20 mA Industrial Loop Monitoring
The ADS7825PG4 naturally fits 4-20 mA industrial loop monitoring because its 4 single-ended channels directly interface with four independent current loops using 100-250 Ω sense resistors, eliminating the need for separate ADCs per channel. According to the manufacturer datasheet, the internal 2.5 V reference and ±2.5 LSB INL deliver measurement accuracy of 0.04% full-scale, well below the 1% tolerance common in industrial process control. The 40 kS/s aggregate rate means all four channels can be scanned at 10 kS/s each, more than adequate for temperature, pressure, flow, and level transmitters with sub-second response times. Power-down mode drops consumption to under 100 µW, enabling panel-mounted PLC I/O cards with high channel density. The 28-DIP package suits through-hole industrial boards preferred in DIN-rail equipment.
Recommandé
Portable Battery Data Logger
The ADS7825PG4 suits portable battery data loggers because the power-down mode reduces current to 100 µW when not actively converting, extending battery life during interval-sampling modes. According to the manufacturer datasheet, four multiplexed channels let a single ADS7825PG4 digitize temperature, humidity, pressure, and analog battery voltage through a single IC, reducing BOM cost versus four single-channel ADCs. The internal 2.5 V reference eliminates an external ADR03 or REF02, while the serial interface connects directly to an MSP430 or low-power ARM Cortex-M0 MCU with only four GPIOs. Operating on a single 5 V rail, the chip consumes 50 mW during continuous 40 kS/s conversion but only microwatts in sleep mode, ideal for unattended field instrumentation.
Recommandé
Multi-Channel Sensor Scanner Front End
The ADS7825PG4 functions as a multi-channel sensor scanner front end by sequencing its four inputs in continuous-conversion mode, populating a FIFO-like behavior on the host-side buffer. The internal mux removes the design engineering of an external 74HC4051 or 74HC4067, saving $0.50-$1 BOM cost per ADC while reducing PCB real estate. According to the manufacturer datasheet, the 25 µs acquisition-plus-conversion time gives 40 kS/s aggregate throughput, meaning a four-sensor array can be scanned at 10 kS/s per channel, perfectly matching the bandwidth of slow piezoelectric, thermistor, and strain-gauge transducers. Hardware-triggered SYNC and BUSY pins allow deterministic sampling windows for vibration-monitoring applications. The 16-bit dynamic range comfortably covers the 70 dB dynamic range typical of bridge sensors.
Recommandé
Precision Instrumentation Test Equipment
Precision instrumentation such as benchtop multimeters and laboratory data-acquisition units benefits from the ADS7825PG4's 16-bit no-missing-codes performance and 2.5 LSB INL linearity, which provides 0.0046% typ. linearity error in voltage measurement. According to the manufacturer datasheet, ±2.5 LSB INL exceeds the 16-bit ideal by exactly the headroom margin needed to support temperature drift correction and calibration-table lookups. The parallel interface mode lets a host CPU read conversion data at full 25 µs cycle speed without protocol overhead, ideal for triggered capture and storage in testing equipment. Pseudo-differential input configuration rejects ground noise in long cable harnesses, and the 28-DIP package simplifies field-replaceable calibration on legacy test instruments.
Recommandé
PlC Analog Input Module
The ADS7825PG4 is ideal for PLC analog input modules because it integrates four channels in one IC and supports a power-down cycle aligned with PLC scan times, multiplying channel density without overwhelming the host 5V regulator. According to the manufacturer datasheet, the 100 µW power-down mode lets the converter idle between PLC scans (typically 10-100 ms), reducing average power dissipation to under 5 mW per ADC, suitable for 16-point 24V field I/O cards. Hardware-pin-driven channel selection through A0/A1 pins offloads sequencing from the host firmware, simplifying ladder-logic programming. The -40 °C to +85 °C operating range covers industrial cabinet environments, and the 28-DIP package is friendlier to high-voltage creepage PCB layout than fine-pitch SOIC.
Recommandé
Optical Scanner and Digitizer Front End
The ADS7825PG4 captures multi-element CCD or photodiode arrays in optical scanner and digitizer front ends, where the 25 µs conversion time matches the line-scan rate of typical desktop image scanners. According to the manufacturer datasheet, the four single-ended inputs map directly to RGB or RGB plus IR photo-sensor channels, freeing the host DSP from demultiplexing operations. Pseudo-differential input mode rejects ambient stray pickup common in optomechanical assemblies, and the internal sample-and-hold avoids the need for an external track-and-hold amplifier. The internal 2.5 V reference scales the analog input range to the typical 0-2.5 V CCD-output window, removing a costly external reference and saving board space.
Recommandé
Medical Patient Monitor Signal Acquisition
The ADS7825PG4 fits medical patient monitor signal acquisition when paired with appropriate medical-grade op-amps for ECG, SpO2, temperature, and respiration channels, digitizing four biosignals into one robust SAR ADC. According to the manufacturer datasheet, the 16-bit resolution and 40 kS/s aggregate rate covers ECG front ends (typically 1-10 kS/s per channel) and respiration (sub-100 Hz) without aliasing or quantization artifacts. The pseudo-differential input mode is robust against patient-electrode common-mode pickup, and the -40 °C to +85 °C range covers IEC 60601-1 enclosure thermal profiles. Power-down mode drops consumption below 100 µW, helping battery-powered portable patient monitors meet IEC 60601-1 battery-runtime standards. The 28-DIP package provides inherent creepage distance between high-impedance medical sensors and digital circuitry.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour ADS7825PG4 — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | ADS7825P | ADS7824PG4 | ADS7824UB/1KG4 | ADS7822PG4 | ADS7817UBG4 |
|---|---|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 28-DIP (0.300 in) | 28-DIP (0.300 in) - same | 28-DIP (0.300 in) - same | 28-DIP (0.300 in) - same | 28-DIP (0.300 in) - same | 28-DIP (0.300 in) - same |
| Resolution | 16-bit | 16-bit | 12-bit | 12-bit | 12-bit | 16-bit |
| Number of Channels | 4 | 4 | 4 | 4 | 4 | 1 |
| Sampling Rate | 40 kS/s | 40 kS/s | 40 kS/s | 40 kS/s | 200 kS/s | 200 kS/s |
| Internal Reference | 2.5V | 2.5V | 2.5V | 2.5V | 2.5V | 2.5V |
| INL (max LSB) | ±2.5 | ±2.5 | ±1 | ±1 | ±1 | ±3 |
| Power-Down Pin | Yes (PWDN) | Yes | Yes | Yes | Yes | Yes |
| Operating Temperature | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C | -40 °C to +85 °C |
Principaux différenciateurs
- Four multiplexed channels in a single chip (vs ADS7817UBG4)
- 16-bit resolution without resolution loss (vs ADS7824PG4)
- Internal 2.5V reference calibrated at factory (vs External reference designs (e.g. REF02))
- 40 kS/s throughput with burst-mode convenience (vs ADS7822PG4 (faster but heavier))
Notes de conception
Use a ferrite bead (such as BLM31PG601SN1L) between the digital 5V supply and the analog 5V supply to isolate AVDD from switching noise on the digital rail. According to the manufacturer datasheet, AVDD must be bypassed by both a 10 µF tantalum (or X5R ceramic) and a 100 nF X7R ceramic placed within 5 mm of pin 7, and DVDD must be bypassed at pin 23 with the same arrangement. Apply power to AVDD first and only enable the converter after AVDD has settled, to avoid latchup; the PWDN pin (pin 28, active low) is convenient for sequencing during startup and standby. Estimated: at VIN=5V, 100% busy-conversion duty, average current draw is approximately 50 mW / 5V = 10 mA.
Each analog input channel must be driven by a low-impedance source (below 1 kΩ) to prevent ADC gain error caused by the SAR's finite input-charge kickback. According to the manufacturer datasheet, the input structure draws a current spike at the falling edge of CONVST (pin 10) and the source impedance must recharge the sampling capacitor (typically 25 pF) within the acquisition time (about 5 µs). For source impedances above 5 kΩ, place a unity-gain op-amp buffer such as OPA277 or TLE2272 between the source and the ADC input. For wide-bandwidth applications, add 50 Ω to 100 Ω damping resistors in series with each input pin and a clamping diode pair to AVDD and AGND to limit ESD transients.
Use a four-layer PCB stack with continuous analog and digital ground planes (no daisy-chain ground returns), and route the four analog-input traces together and away from any digital signals to minimize crosstalk. According to the manufacturer datasheet, place the four channel-input caps (typically 10 pF to 100 pF) within 2 mm of pins 2-5 to suppress RF interference above 100 MHz. Tie CS (pin 25) low during continuous-conversion mode and route all digital outputs (D0-D7, BUSY, DATAOUT, DCLOCK) clear of the analog inputs. The reference decoupling network on pin 6 (VREF) must use a 2.2 µF tantalum in parallel with 100 nF X7R, with traces forming a Kelvin connection to the pin, not via a shared analog ground.
Do not exceed AVDD+0.3V or AGND-0.3V at any analog input - this is the absolute-maximum rating and will permanently damage the ESD clamps. According to the manufacturer datasheet, leaving any of the four input channels floating can inject noise into the MUX and show up as a noisy conversion on adjacent channels, so always tie unused channels to mid-supply (typically AVDD/2) through a 1 kΩ resistor. Avoid running the device with EXT/INT clock select in the wrong state: a floating CLOCK pin (pin 9) will randomly select internal vs external clock and produce unpredictable sample rates. Tie CLOCK directly to DVDD or DGND when not using external clocking, and never leave PWDN floating - tie it to DVDD for normal operation.
The ADS7825PG4 in 28-DIP operates to -40 °C to +85 °C ambient; the DIP package exhibits roughly 70 °C/W thermal resistance under still air (estimated from datasheet figures and JEDEC EIA/JESD51 guidelines for 28-DIP packages). At maximum power (50 mW) the junction temperature rise is less than 4 °C, so self-heating is negligible and no heatsink is needed. However, when the host board reaches its own thermal limit (e.g. inside a sealed PLC enclosure rated 70 °C), verify that the IC ambient remains below 85 °C by placing the part on a thermal pad or copper pour rather than a long solid ground plane edge. Operate the device in continuous-conversion mode whenever possible instead of intermittent bursts to keep internal temperature stable and avoid thermal-cycling drift.
Informations de conformité
RoHS-compliant, lead-free (Pb-free, Green) per TI product page. The -G4 suffix indicates green/RoHS re-flow packaging code. Not AEC-Q100 qualified (industrial-grade -40 to +85 °C only).
