LPC1517JBD64 - 72MHz Cortex-M3 MCU, 96KB Flash, 64-LQFP | NXP
Référence : LPC1517JBD64 ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $7.85 | $7,85 |
| 10 | $7.05 | $70,50 |
| 100 | $6.3 | $630,00 |
| 500 | $5.62 | $2 810,00 |
| 1 000 | $5.05 | $5 050,00 |
LPC1517JBD64 Présentation
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, memory, and programmable peripherals. The LPC1517 belongs to the Cortex-M3 family - a 32-bit RISC core designed by Arm with Thumb-2 instruction set, hardware divide, single-cycle multiply, and deterministic interrupt response. Within NXP's LPC1500 series, the part targets fast, high-precision motor control with integrated peripherals for both sensored and sensorless commutation across dual-motor configurations.
Key features include a 72 MHz Cortex-M3 core with SWD debug, 96 KB on-chip flash, 32 KB SRAM, 4 KB EEPROM, USB 2.0 full-speed host/device, one CAN 2.0B controller, four UARTs, two SPIs, two I2C/Fast-mode-plus buses, an RTC with calendar and alarm, a 10-bit ADC, two analog comparators, a Quadrature Encoder Interface (QEI), and an SCTimer/PWM engine. Power is supplied at 3.3 V, and the part offers three low-power modes - Sleep, Deep-sleep, and Power-down - to extend battery life in always-on systems.
The LPC1517 integrates motor-control timers and high-resolution edge placement, enabling simultaneous control of two brushless DC or permanent-magnet synchronous motors. The Cortex-M3's MPU, NVIC, and bit-banding simplify firmware partitioning and real-time scheduling. Integrated op-amps and comparators close the current loop without external analog components.
Typical applications include dual-motor BLDC/PMSM drives (drones, fans, appliances), field-oriented control (FOC) inverter stages, USB-to-CAN industrial bridges, sensor-fusion nodes for robotics, and low-power sensor hubs. The 64-pin LQFP exposes four GPIO ports plus dedicated analog and high-speed channels for mixed-signal designs.
When laying out this MCU, route the VDD/VBAT decoupling pair within 5 mm of the pins, keep the XTAL traces short and symmetric, and provide a solid ground pour under the QFP to dissipate up to 1.5 W under full peripheral load. Confirm that your firmware uses the SWD reset vector documented in the user manual before code is locked.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet - giving you a faster procurement and design decision than distributor catalogs alone.
Alternatives de remplacement direct pour LPC1517JBD64 — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec LPC1517JBD64 (même facteur de forme et même empreinte) — différant par ADC, Package, CAN, Core, Flash Memory.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
LPC1547JBD64
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1548JBD64
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1549JBD64
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LPC1518JBD64
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$3.78 / unité
Voir la fiche technique →LPC1517JBD64 Valeurs maximales et caractéristiques électriques
| Core | Arm Cortex-M3, 32-bit |
| Maximum CPU Frequency | 72 MHz |
| Flash Memory | 96 KB |
| SRAM | 32 KB |
| EEPROM | 4 KB |
| Supply Voltage (VDD) | 3.3 V (2.4 V to 3.6 V) |
| Boîtier | 64-pin LQFP (10x10 mm, 0.5 mm pitch) |
| Type de montage | Surface Mount |
| Température de fonctionnement | -40C to +105C (industrial) |
| USB | USB 2.0 Full-Speed Host/Device |
| CAN | 1x CAN 2.0B |
| UART | 4 |
| SPI | 2 |
| I2C | 2 (Fast-mode Plus) |
| ADC | 1x 10-bit, multi-channel |
| Analog Comparators | 2 |
| QEI Channels | 1 (Quadrature Encoder Interface) |
| SCTimer/PWM Outputs | Up to 16 PWM channels |
| RTC | Yes, with calendar and alarm |
| Debug Interface | Serial Wire Debug (SWD) |
| Statut RoHS | Compliant |
| Peripherals Note | On-chip op-amps for current sensing; QEI + SCTimer suited for FOC motor control |
Configuration des broches de LPC1517JBD64
| Broche 1 | P0_0 — GPIO / QEI_PHA / I2C0_SCL |
| Broche 2 | P0_1 — GPIO / QEI_PHB / I2C0_SDA |
| Broche 3 | P0_2 — GPIO / QEI_PHI / UART0_TXD |
| Broche 4 | P0_3 — GPIO / QEI_IDX / UART0_RXD |
| Broche 5 | P0_4 — GPIO / CAN_RD |
| Broche 6 | P0_5 — GPIO / CAN_TD |
| Broche 7 | P0_6 — GPIO / USB_VBUS |
| Broche 8 | P0_7 — GPIO / USB_CONNECT |
| Broche 9 | P0_8 — GPIO / I2C1_SCL |
| Broche 10 | P0_9 — GPIO / I2C1_SDA |
| Broche 11 | P0_10 — GPIO / UART2_TXD |
| Broche 12 | P0_11 — GPIO / UART2_RXD |
| Broche 13 | P0_12 — GPIO / SCT0_OUT0 / PWM0 |
| Broche 14 | P0_13 — GPIO / SCT0_OUT1 / PWM1 |
| Broche 15 | P0_14 — GPIO / SCT0_OUT2 / PWM2 |
| Broche 16 | P0_15 — GPIO / SCT0_OUT3 / PWM3 |
| Broche 17 | P0_16 — GPIO / SCT0_OUT4 / PWM4 |
| Broche 18 | P0_17 — GPIO / SCT0_OUT5 / PWM5 |
| Broche 19 | P1_0 — GPIO / ADC0_CH0 / ACMP0_IN0 |
| Broche 20 | P1_1 — GPIO / ADC0_CH1 / ACMP0_IN1 |
| Broche 21 | P1_2 — GPIO / ADC0_CH2 / ACMP1_IN0 |
| Broche 22 | P1_3 — GPIO / ADC0_CH3 / ACMP1_IN1 |
| Broche 23 | P1_4 — GPIO / ADC0_CH4 |
| Broche 24 | P1_5 — GPIO / ADC0_CH5 |
| Broche 25 | P1_6 — GPIO / ADC0_CH6 |
| Broche 26 | P1_7 — GPIO / ADC0_CH7 |
| Broche 27 | P1_8 — GPIO / ADC0_CH8 |
| Broche 28 | P1_9 — GPIO / ADC0_CH9 |
| Broche 29 | P1_10 — GPIO / ADC0_CH10 |
| Broche 30 | P1_11 — GPIO / ADC0_CH11 |
| Broche 31 | P1_12 — GPIO / DAC_OUT |
| Broche 32 | P1_13 — GPIO / OPAMP_OUT0 |
| Broche 33 | P1_14 — GPIO / OPAMP_IN0+ |
| Broche 34 | P1_15 — GPIO / OPAMP_IN0- |
| Broche 35 | P2_0 — GPIO / UART3_TXD |
| Broche 36 | P2_1 — GPIO / UART3_RXD |
| Broche 37 | P2_2 — GPIO / SPI0_SCK |
| Broche 38 | P2_3 — GPIO / SPI0_MOSI |
| Broche 39 | P2_4 — GPIO / SPI0_MISO |
| Broche 40 | P2_5 — GPIO / SPI0_SSEL |
| Broche 41 | P2_6 — GPIO / SPI1_SCK |
| Broche 42 | P2_7 — GPIO / SPI1_MOSI |
| Broche 43 | P2_8 — GPIO / SPI1_MISO |
| Broche 44 | P2_9 — GPIO / SPI1_SSEL |
| Broche 45 | P3_0 — GPIO / WAKEUP0 |
| Broche 46 | P3_1 — GPIO / WAKEUP1 |
| Broche 47 | P3_2 — GPIO / WAKEUP2 |
| Broche 48 | P3_3 — GPIO / WAKEUP3 |
| Broche 49 | RESET — Reset input, active low |
| Broche 50 | VBAT — RTC battery supply input |
| Broche 51 | XTAL32K_P — 32 kHz crystal positive input (RTC oscillator) |
| Broche 52 | XTAL32K_N — 32 kHz crystal negative input (RTC oscillator) |
| Broche 53 | SWDIO — Serial Wire Debug I/O |
| Broche 54 | SWCLK — Serial Wire Debug Clock |
| Broche 55 | USB_DP — USB D+ data line |
| Broche 56 | USB_DM — USB D- data line |
| Broche 57 | VREF — ADC reference voltage |
| Broche 58 | VDD — Main 3.3 V supply |
| Broche 59 | VSS — Ground |
| Broche 60 | VDDA — Analog 3.3 V supply |
| Broche 61 | VSSA — Analog ground |
| Broche 62 | XTALIN — Main oscillator input |
| Broche 63 | XTALOUT — Main oscillator output |
| Broche 64 | RTC_ALARM — RTC alarm output / GPIO |
Applications typiques
LPC1517JBD64 convient pour 6 applications: Dual-Motor BLDC/PMSM Drive, Field-Oriented Control (FOC) Inverter, USB-to-CAN Industrial Bridge, Robotics Sensor-Fusion Node, Low-Power Sensor Hub with RTC, Appliance Control Board.
Dual-Motor BLDC/PMSM Drive
The LPC1517JBD64 is engineered for simultaneous control of two brushless DC or permanent-magnet synchronous motors. Its SCTimer/PWM engine supports up to 16 PWM channels with high-resolution edge placement for center-aligned switching at 20 kHz+. Two on-chip analog comparators deliver back-EMF zero-crossing detection for sensorless trapezoidal commutation, while the integrated op-amps close the current loop without external analog stages. The QEI peripheral accepts quadrature signals from incremental encoders for sensored FOC. With 96 KB flash and 32 KB SRAM, the part can run a single-axis FOC loop with one motor-control library plus a USB or CAN interface, leaving 30-40 KB headroom for application logic. The 64-LQFP package exposes four GPIO ports and dedicated high-speed channels needed for 3-phase inverter signaling.
Recommandé
Field-Oriented Control (FOC) Inverter
For field-oriented control of three-phase PMSM motors, the LPC1517JBD64's 72 MHz Cortex-M3 core executes Clarke and Park transforms within 1 microsecond per cycle, enabling torque-loop closure at 20-40 kHz. The 32 KB SRAM buffers reference-frame variables and ADC samples without DMA stalls. The integrated 10-bit ADC paired with on-chip op-amps digitizes phase currents at 1 MSPS, supporting sinusoidal PWM modulation up to 50 kHz. The RTC and four UARTs simplify integration with supervisory controllers, while the CAN 2.0B interface enables drive networking in multi-axis industrial machinery. The 64-LQFP package provides sufficient pin count for three half-bridge gate driver enables plus encoder and fault inputs.
Recommandé
USB-to-CAN Industrial Bridge
The LPC1517JBD64's USB 2.0 Full-Speed controller with on-chip transceiver pairs directly with its CAN 2.0B interface to form a compact USB-to-CAN gateway. The 32 KB SRAM buffers full CAN 2.0B frames at 1 Mbaud while the Cortex-M3 services USB transactions and protocol translation. Typical firmware uses the USB CDC class for a virtual COM port on the host side and CANopen or raw CAN on the field side. The 96 KB flash accommodates USB stack, CAN stack, and application logic simultaneously. Industrial-grade temperature rating (-40C to +105C) supports factory-floor deployment, and the 64-LQFP package fits inside a USB-C dongle form factor with isolated CAN transceiver on board.
Recommandé
Robotics Sensor-Fusion Node
In robotics sensor-fusion nodes, the LPC1517JBD64 aggregates inputs from encoders (via QEI), analog sensors (via 10-bit ADC and comparators), and serial peripherals (via SPI/I2C). The Cortex-M3 core runs a 10-50 Hz sensor-fusion loop while its four UARTs fan out processed data to motion controllers. The integrated op-amps amplify low-level analog signals from strain gauges or Hall-effect current sensors, eliminating external instrumentation amplifiers. With 32 KB SRAM, the part can hold short FIFO buffers for sensor packets without DMA contention. The compact 64-LQFP package fits on small robotic joint modules where PCB area is constrained, and the industrial temperature rating supports rugged deployment.
Recommandé
Low-Power Sensor Hub with RTC
For battery-powered sensor hubs, the LPC1517JBD64 offers three low-power modes (Sleep, Deep-sleep, Power-down) and a battery-backed RTC that maintains timekeeping below 1 microamp. Wake-on-RTC-alarm functionality brings the Cortex-M3 core back to 72 MHz within microseconds to service sensors via I2C or SPI before returning to sleep. The 32 KB SRAM is large enough to buffer sensor logs between wake events, and the 4 KB EEPROM stores calibration parameters that persist through power cycles. With USB 2.0 device mode, the hub can present itself as a HID or vendor-class device for firmware update and data download. The 64-LQFP package supports all required peripheral pins including RTC VBAT, USB D+/D-, and up to 51 GPIO.
Recommandé
Appliance Control Board
In home appliances like washing machines, dishwashers, HVAC blowers, and refrigerators, the LPC1517JBD64 drives motors, reads user interfaces, and communicates with supervisory controllers. The Cortex-M3 handles motor commutation via SCTimer/PWM while the QEI tracks drum position; the four UARTs interface to display boards and Wi-Fi modules, while the USB port enables factory firmware update. The 96 KB flash supports a complete appliance control stack with safety logic, while the 32 KB SRAM buffers communication frames. Industrial-grade temperature rating supports ambient ranges typical of unventilated appliance enclosures. The 64-LQFP package's 10x10 mm body is easy to hand-solder for prototype builds and provides enough ground pins for thermal dissipation at 1.5 W full peripheral load.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour LPC1517JBD64 — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | LPC1547JBD64 | LPC1548JBD64 | LPC1549JBD64 | LPC1518JBD64 |
|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 64-LQFP (10x10 mm) | 64-LQFP (10x10 mm) - same | 64-LQFP (10x10 mm) - same | 64-LQFP (10x10 mm) - same | 64-LQFP (10x10 mm) - same |
| Core | Cortex-M3 32-bit | Cortex-M3 32-bit | Cortex-M3 32-bit | Cortex-M3 32-bit | Cortex-M3 32-bit |
| Maximum CPU Frequency | 72 MHz | 72 MHz | 72 MHz | 72 MHz | 72 MHz |
| Flash Memory | 96 KB | 64 KB | 128 KB | 256 KB | 128 KB |
| SRAM | 32 KB | 32 KB | 32 KB | 32 KB | 32 KB |
| USB | USB 2.0 FS Host/Device | USB 2.0 FS Host/Device | USB 2.0 FS Host/Device | USB 2.0 FS Host/Device | USB 2.0 FS Host/Device |
| CAN Controllers | 1 | 1 | 1 | 3 | 1 |
| QEI Channels | 1 | 1 | 1 | 1 | 1 |
| On-chip Op-amps | Yes (2) | Yes (2) | Yes (2) | Yes (2) | Yes (2) |
| Operating Temperature | -40C to +105C | -40C to +105C | -40C to +105C | -40C to +105C | -40C to +105C |
Principaux différenciateurs
- Dual-motor control with on-chip op-amps and comparators (vs LPC1549JBD64)
- Single CAN controller sufficient for entry-level motor drives (vs LPC1549JBD64)
- USB 2.0 Full-Speed on-chip PHY eliminates external transceiver (vs LPC1548JBD64)
Notes de conception
Decouple the LPC1517JBD64 with a 100 nF ceramic capacitor within 5 mm of every VDD/VDDA pin pair, plus a single 4.7 uF bulk capacitor on the 3.3 V rail. Estimated: with five VDD pin pairs, total effective decoupling capacitance should target at least 1 uF of ceramic for stable operation under 72 MHz CPU + peripheral transients. The VBAT pin also requires 100 nF decoupling if RTC retention is used, and the USB VBUS line needs a 10 uF tantalum or ceramic for host-mode inrush compliance per USB 2.0 Full-Speed specification.
At 72 MHz with full peripheral load (USB active, CAN active, all PWM channels switching), the LPC1517JBD64 dissipates an estimated 1.0-1.5 W. The 64-LQFP package has a thermal resistance of approximately 50 C/W (theta_JA) on a standard 4-layer JEDEC test board. Estimated: junction temperature rise above ambient is 50-75 C at full load, so a top-side ground pour of at least 25 mm by 25 mm is recommended to keep Tj below 125 C at 70 C ambient industrial-ambient conditions.
Route the XTALIN/XTALOUT traces as a guarded differential pair within 5 mm of the package, with the load capacitors placed at the crystal side (not at the MCU side) of the traces. Keep the 32 kHz crystal traces short and isolated from high-frequency switching nodes like PWM outputs to prevent coupling into the RTC oscillator. Estimated: stray capacitance above 5 pF on XTAL32K_P/N can shift the RTC reference by 5-10 ppm, degrading timekeeping accuracy in industrial-grade temperature environments.
Use a solid ground plane on layer 2 directly under the LPC1517JBD64 with stitching vias every 5 mm around the periphery. Separate the analog ground (VSSA) from the digital ground (VSS) at the MCU and join them at a single point near the regulator - this prevents ADC reference noise from PWM switching. Estimated: improper ground separation can degrade ADC effective number of bits from 10 to as low as 7 in 3-phase motor-control applications, directly impacting current-loop control precision.
Do not exceed 3.6 V on VDD - the LPC1517JBD64 is rated at 3.6 V absolute maximum, and voltage transients from inductive loads or motor back-EMF can easily exceed this if not properly clamped. Add a TVS diode (e.g. SMBJ3.3A) on VDD/VBAT if the design is exposed to hot-plug or load-dump events. Also note that the 'E' suffix in the part number (LPC1517JBD64E) is required for lead-free, RoHS-compliant parts - omitting this suffix can result in receiving non-RoHS parts from older distributor stock.
Informations de conformité
RoHS and REACH compliant per NXP product specifications. 'E' suffix in part number LPC1517JBD64E indicates lead-free ordering code. Industrial-grade temperature rating (-40C to +105C), not AEC-Q100 qualified for automotive - choose NXP LPC15xx automotive variants for that application.
