LTC1409IG - 12-Bit 800ksps Sampling ADC | Analog Devices
Référence : LTC1409IG ✓ ActifLTC1409IG Présentation
A sampling ADC is a data-converter category that samples an analog input at a specified instant and converts it into a digital code. The LTC1409IG belongs to the successive-approximation-register family, where a sample-and-hold circuit captures the input before an internal 12-bit conversion completes. It includes a high-dynamic-range sample-and-hold stage and a precision internal reference, while also accepting an external reference when greater system-level control is required.
Key characteristics include an 800 ksps maximum sampling rate, a 1 µs conversion time, and a ±2.5 V full-scale differential input range. The converter provides single-ended or differential signal handling, digital shutdown control, and selectable operating modes. Its specified maximum DC linearity and differential nonlinearity are ±1 LSB, while signal-chain performance reaches 72.5 dB SINAD and 86 dB THD at the Nyquist frequency.
The architecture supports both internal and external reference operation. The internal reference has a stated temperature coefficient of 15 ppm/°C, providing a compact solution when a dedicated external reference would add cost or board area. Shutdown options include Nap, which reduces power dissipation to 4 mW, and Sleep, which reduces it to 10 µW, making the converter suitable for intermittently sampled acquisition systems.
Typical applications include process-control loops, multichannel measurement systems, communications receivers, industrial instrumentation, waveform capture, and precision sensor acquisition. Its parallel data bus allows the converted word to be read directly by a microcontroller, DSP, FPGA, or other digital controller, making bus timing and signal-integrity layout important considerations.
When designing a board around the LTC1409IG, preserve the specified dual-supply range and ensure adequate input settling before each conversion. Place input and reference components close to their associated pins, maintain short parallel-bus routes, and provide suitable decoupling. Confirm that the selected downstream logic voltage and acquisition timing support the converter's parallel interface and sampling requirements.
This page combines manufacturer specifications, package information, verified source links, drop-in family references, and practical design guidance to support component selection, schematic planning, PCB layout, and replacement evaluation.
Alternatives de remplacement direct pour LTC1409IG — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
LTC1409IG#PBF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LTC1409IG#TR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LTC1409CG#PBF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LTC1409CG#TR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LTC1409IG Valeurs maximales et caractéristiques électriques
| Converter Type | 12-bit sampling successive-approximation-register ADC |
| Résolution | 12 bit |
| Fréquence d'échantillonnage | 800 ksps |
| Conversion Time | 1 µs |
| Full-Scale Input Range | ±2.5 V |
| Input Configuration | True differential, single-ended, and differential input |
| Digital Interface | 12-bit parallel interface |
| Tension d'alimentation | ±5 V |
| Power Dissipation | 80 mW |
| Nap Mode Power Dissipation | 4 mW |
| Sleep Mode Power Dissipation | 10 µW |
| Internal Reference Temperature Coefficient | 15 ppm/°C |
| Integral Nonlinearity | ±1 LSB maximum |
| Differential Nonlinearity | ±1 LSB maximum |
| Signal-to-Noise Plus Distortion | 72.5 dB at Nyquist |
| Total Harmonic Distortion | 86 dB at Nyquist |
| Boîtier | 28-pin SSOP |
| Type de montage | Surface mount |
| Shutdown Control | Two digitally selectable power shutdown modes |
| Reference | Internal 15 ppm/°C reference or external reference |
Guide de configuration des broches du LTC1409IG 28-pin ssop
Configuration des broches du LTC1409IG (boîtier 28-pin ssop). Ce composant analogique comporte des broches d'entrée, de sortie et d'alimentation. Consultez la fiche technique du fabricant pour les configurations des broches d'annulation d'offset, de compensation et d'activation. Idéal pour le conditionnement de signaux et les circuits amplificateurs.
Aucune donnée de brochage détaillée disponible pour LTC1409IG.
Consultez la fiche technique pour la configuration complète des broches.
Applications typiques
LTC1409IG convient pour 6 applications: Industrial Process Control, Precision Instrumentation, Communications Receiver, Waveform and Signal Capture, Sensor Acquisition, Intermittent Low-Power Acquisition.
Industrial Process Control
The LTC1409IG suits process-control loops that must acquire a changing analog measurement at up to 800 ksps. Its 12-bit resolution and ±1 LSB maximum INL and DNL provide a practical balance between measurement accuracy and conversion speed, while the true-differential input helps reject common-mode noise on sensor and transducer lines. Place the converter behind the analog front end, connect its 12-bit parallel output to the controller, and account for acquisition settling. The 1 µs conversion time allows rapid updates, although the complete loop rate also depends on signal conditioning, controller timing, and the latency of any digital filtering.
Recommandé
Precision Instrumentation
The LTC1409IG is appropriate for laboratory and industrial instruments that digitize moderate-bandwidth analog signals while retaining a straightforward parallel interface. Its 72.5 dB SINAD and 86 dB THD at Nyquist support high-quality sampled waveforms, and the internal 15 ppm/°C reference reduces the component count when system-level reference control is unnecessary. Use an external reference only when calibration or shared-reference architecture requires it. The 28-pin SSOP also supports compact boards, although analog routing, reference stability, and digital-bus timing require careful layout.
Recommandé
Communications Receiver
The LTC1409IG can serve as a sampling stage in a communications receiver where a direct parallel code is preferable to a serial ADC interface. Its 800 ksps maximum rate and no-pipeline-delay behavior provide straightforward timing from conversion command to code availability. The differential input architecture is useful when the receiver produces a centered analog waveform and the front end can establish the required common-mode and full-scale conditions. Designers should optimize anti-alias filtering before the ADC and verify output setup timing against the receiving processor's bus requirements.
Recommandé
Waveform and Signal Capture
The LTC1409IG is well matched to deterministic waveform-capture systems requiring 12-bit data without conversion pipeline delay. Each conversion can be associated directly with its acquisition interval, which simplifies trigger alignment and improves controllability in laboratory or test systems. Its ±2.5 V full-scale differential range allows paired signals to be sampled when the source can be biased into the converter's common-mode window. For wideband use, the analog input network must provide adequate gain, bandwidth, settling, and anti-alias filtering before the converter input.
Recommandé
Sensor Acquisition
The LTC1409IG can digitize outputs from pressure, temperature, strain, and position sensors when the required update rate does not exceed 800 ksps and 12-bit resolution is adequate. Differential sampling is particularly useful with bridge or ratiometric sensors because it can improve rejection of common-mode disturbance. The converter's internal reference provides a compact baseline, while Nap and Sleep modes reduce consumption in duty-cycled measurements. The analog conditioning stage should include the required gain and filtering, and the controller should manage input settling, conversion trigger, and power-state transitions.
Recommandé
Intermittent Low-Power Acquisition
The LTC1409IG supports systems that sample on demand by using its digitally selectable Nap and Sleep shutdown modes. Normal operation draws 80 mW from ±5 V supplies, Nap reduces dissipation to 4 mW, and Sleep reduces it to 10 µW, allowing a duty-cycled design to spend most of its time in a low-power state. The controller should account for wake-up and reacquisition time, then reject stale or unsettled samples before initiating a valid conversion. This architecture is useful for portable test equipment and industrial nodes that monitor events intermittently rather than continuously.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour LTC1409IG — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | LTC1409IG#PBF | LTC1409IG#TR | LTC1409CG#PBF | LTC1409CG#TR |
|---|---|---|---|---|---|
| Package | 28-SSOP | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same | 28-SSOP - same |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Sampling Rate | 800 ksps | 800 ksps | 800 ksps | 800 ksps | 800 ksps |
| Conversion Time | 1 µs | 1 µs | 1 µs | 1 µs | 1 µs |
| Full-Scale Input Range | ±2.5 V | ±2.5 V | ±2.5 V | ±2.5 V | ±2.5 V |
| Interface | 12-bit parallel | 12-bit parallel | 12-bit parallel | 12-bit parallel | 12-bit parallel |
| Normal Power Dissipation | 80 mW | 80 mW | 80 mW | 80 mW | 80 mW |
| Nap Mode Power Dissipation | 4 mW | 4 mW | 4 mW | 4 mW | 4 mW |
| Orderable Suffix | IG | IG#PBF - lead-free ordering variant | IG#TR - tape-and-reel ordering variant | CG#PBF - commercial-grade lead-free variant | CG#TR - commercial-grade tape-and-reel variant |
Principaux différenciateurs
- Deterministic sampling without pipeline delay (vs AD679KD)
- Lower sampling rate with higher stated resolution (vs AD679KD)
- Selectable low-power operating states (vs LTC1409IG#PBF)
Notes de conception
Route the analog input, reference, and ground connections with short paths and keep switching-node copper away from the converter. The manufacturer datasheet's typical application should guide component placement and grounding. Differential input routing should preserve symmetry where practical so conversion error is not increased by unequal parasitics or timing between the two input networks.
Treat the 12-bit parallel outputs as a synchronous bus and confirm output timing against the receiving controller's setup and hold requirements. Keep traces short, provide a continuous ground reference, and avoid routing the bus through noisy analog areas. The 1 µs conversion time gives limited timing margin, so clock skew, trace-length mismatch, and output-driver loading deserve attention.
Provide clean ±5 V rails and place the required bypass capacitors close to the converter's supply and ground pins. Decouple the supply connections to minimize the impedance seen by switching currents. For intermittent systems, coordinate Nap or Sleep commands with trigger logic and discard any conversion affected by wake-up or input-settling time.
Do not assume that the full-scale input range alone determines the allowable common-mode voltage. Design the front end so both inputs satisfy the converter's operating limits, and allow the sample-and-hold input to settle before each 1 µs conversion. Also verify that the external-reference arrangement, when used, meets the reference amplitude and stability requirements in the manufacturer datasheet.
Informations de conformité
The LTC1409IG#PBF suffix identifies a lead-free ordering variant, but no broader compliance declaration was identified for the target MPN.