LTC2226HLU#PBF - 12-bit 25Msps ADC, 32-TQFP | Analog Devices
Référence : LTC2226HLU#PBF ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $28.5 | $28,50 |
| 10 | $25.2 | $252,00 |
| 100 | $21.4 | $2 140,00 |
| 500 | $18.6 | $9 300,00 |
| 1 000 | $16.8 | $16 800,00 |
LTC2226HLU#PBF Présentation
An ADC (analog-to-digital converter) is a data converter IC that samples a continuous analog voltage and produces a discrete binary code proportional to the input. Pipelined ADCs like the LTC2226 are the dominant architecture for sample rates between 5 Msps and 250 Msps because they balance high throughput, low power, and small die area. Within the converter hierarchy, the LTC2226 sits under: ADC -> data converter -> signal-chain IC -> mixed-signal semiconductor. It is part of a pin-compatible family (LTC2246 at 14-bit, LTC2226 at 12-bit), enabling resolution swaps on the same PCB.
Key features include a flexible 1 Vp-p to 2 Vp-p differential or single-ended analog input range, an integrated sample-and-hold amplifier with 575 MHz full-power bandwidth, a duty-cycle-stabilized clock input, shutdown and nap power-save modes, and no-missing-codes over temperature. The 0.25 LSB RMS transition noise sets a low noise floor relative to full scale.
Architecturally, the LTC2226 uses a multi-stage switched-capacitor pipeline with digital error correction, fed by an internal or external reference. A separate output supply rail (OVdd, 0.5 V to 3.6 V) lets the CMOS outputs interface directly to 1.8 V, 2.5 V, or 3.3 V logic without level shifters.
Typical applications include communications IF/baseband digitizers, portable instrumentation, CCD/camera imaging pipelines, ultrasound front-ends, and radar/digitizer cards. The wide input bandwidth and 75 mW dissipation suit battery-powered field equipment.
A primary design consideration is the analog input network: a low-noise differential driver (such as the LT6600 or AD8138) feeding a properly terminated transformer preserves the SFDR rating. Decoupling requires 0.1 µF ceramics close to AVdd and OVdd with a 10 µF bulk cap at the board entry.
This page consolidates distributor price, drop-in 32-TQFP alternatives, and design notes not found in the manufacturer datasheet alone.
Alternatives de remplacement direct pour LTC2226HLU#PBF — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec LTC2226HLU#PBF (même facteur de forme et même empreinte) — différant par Data Interface, Resolution, SFDR, SNR, Sample Rate.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
LTC2227HLU#PBF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LTC2246HLU#PBF
✅ Remplacement direct✓ En stock
$9.75 / unité
Voir la fiche technique →LTC2228HLU#PBF
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LTC2226HLU
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LTC2226IUK#PBF
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
LTC2226HLU#PBF Valeurs maximales et caractéristiques électriques
| Manufacturer | Analog Devices Inc. |
| Manufacturer Origin | Linear Technology (acquired by Analog Devices) |
| Part Number | LTC2226HLU#PBF |
| Fonction | 12-bit pipelined analog-to-digital converter (ADC) |
| Résolution | 12 bits |
| Sample Rate | 25 Msps (kSamples/sec) |
| Number of Channels | 1 input |
| Architecture | Pipelined with internal S/H |
| INL (Typical) | ±0.3 LSB |
| DNL (Typical) | ±0.15 LSB |
| SNR | 71.4 dB |
| SFDR | 90 dB |
| Transition Noise (RMS) | 0.25 LSB |
| Missing Codes | No missing codes over temperature |
| Analog Supply (AVdd) | 3 V (2.8 V to 3.5 V range) |
| Output Supply (OVdd) | 0.5 V to 3.6 V |
| Supply Current / Power | 75 mW (single 3 V supply) |
| Analog Input Range | 1 Vp-p to 2 Vp-p (differential/single-ended) |
| Full-Power Bandwidth (S/H) | 575 MHz |
| Input Type | Differential, Single-Ended |
| Reference | Internal or External |
| Data Interface | Parallel (CMOS) |
| Clock Input | Single-ended, duty-cycle stabilizer |
| Power-Save Modes | Shutdown, Nap |
| Température de fonctionnement | -40 °C to +125 °C |
| Boîtier / Format | 32-TQFP (5 mm × 5 mm, MS-026, plastic) |
| Screening Level | Automotive |
| Terminal Form | Gull Wing |
| Type de montage | Surface Mount |
| Lead-Free / RoHS | Yes (#PBF suffix) |
Configuration des broches de LTC2226HLU#PBF
| Broche 1 | CLK — Clock input, single-ended, duty-cycle stabilized |
| Broche 2 | OGND — Output driver ground |
| Broche 3 | D0 — Data output bit 0 (LSB) |
| Broche 4 | D1 — Data output bit 1 |
| Broche 5 | D2 — Data output bit 2 |
| Broche 6 | D3 — Data output bit 3 |
| Broche 7 | D4 — Data output bit 4 |
| Broche 8 | D5 — Data output bit 5 |
| Broche 9 | D6 — Data output bit 6 |
| Broche 10 | D7 — Data output bit 7 |
| Broche 11 | D8 — Data output bit 8 |
| Broche 12 | D9 — Data output bit 9 |
| Broche 13 | D10 — Data output bit 10 |
| Broche 14 | D11 — Data output bit 11 (MSB) |
| Broche 15 | OF — Output flag / overflow indicator |
| Broche 16 | OVdd — Output supply voltage (0.5 V to 3.6 V) |
| Broche 17 | SHDN — Shutdown mode control |
| Broche 18 | NAP — Nap mode control |
| Broche 19 | MODE — Mode selection |
| Broche 20 | REFT — Internal reference top / decouple |
| Broche 21 | REFB — Internal reference bottom / decouple |
| Broche 22 | REFOUT — Reference output |
| Broche 23 | REFIN — External reference input |
| Broche 24 | Vcm — Common-mode voltage bypass |
| Broche 25 | AIN+ — Analog input, positive |
| Broche 26 | AIN- — Analog input, negative |
| Broche 27 | AGND — Analog ground |
| Broche 28 | AVdd — Analog supply (2.8 V to 3.5 V) |
| Broche 29 | AGND — Analog ground (duplicate) |
| Broche 30 | AVdd — Analog supply (duplicate) |
| Broche 31 | NC — Not connected (per datasheet) |
| Broche 32 | NC — Not connected (per datasheet) |
Applications typiques
LTC2226HLU#PBF convient pour 6 applications: Communications IF Digitizer, Portable Imaging Pipeline, Medical Ultrasound Front-End, Radar / Lidar Digitizer, Industrial Test Instrumentation, Software Defined Radio (SDR).
Communications IF Digitizer
The LTC2226HLU#PBF suits communications IF/baseband digitizers up to 25 Msps, where its 71.4 dB SNR and 90 dB SFDR preserve signal integrity through digital demodulation. The 575 MHz full-power sample-and-hold bandwidth captures intermediate-frequency signals with minimal aliasing, while 75 mW dissipation keeps thermal budgets realistic in multi-channel base stations. A differential driver such as the AD8138 or a 1:1 transformer between the mixer and the ADC inputs preserves SFDR; place a 0.1 µF decoupling cap at AVdd and OVdd within 5 mm of the pins. The 0.5 V to 3.6 V output supply interface lets the digital output bus tie directly to a baseband FPGA at 1.8 V or 2.5 V logic without glue logic.
Recommandé
Portable Imaging Pipeline
In CCD/camera imaging pipelines, the LTC2226HLU#PBF digitizes pixel-rate analog outputs from line-scan or area-array sensors at sample rates up to 25 Msps. Its ±0.3 LSB INL and ±0.15 LSB DNL maintain linearity across the full input range, critical for accurate color reconstruction. The shutdown and nap modes reduce power to a few milliwatts between scanlines, extending battery life in handheld inspection equipment. The flexible 1 Vp-p to 2 Vp-p input range accommodates direct coupling from CCD output stages without external PGA stages. Designers should route analog and digital grounds on a split plane joined under the ADC AVdd pin to avoid digital switching noise coupling into the analog input.
Recommandé
Medical Ultrasound Front-End
The LTC2226HLU#PBF fits ultrasound front-end digitizers in portable diagnostic imaging where 8-12 MHz transducer outputs are sampled at 25 Msps per channel. Its 575 MHz full-power bandwidth and 71.4 dB SNR preserve the dynamic range required for tissue harmonic imaging while keeping per-channel power at 75 mW, important for dense multi-channel probe arrays. The duty-cycle-stabilized clock input tolerates non-50 percent clocks from FPGA-generated timing, simplifying system clock trees. Automotive-grade screening under the #PBF part numbering scheme supports medical-device reliability programs. Use an active probe-balancing transformer at the input to maintain CMRR above 60 dB across the 5-15 MHz ultrasound band.
Recommandé
Radar / Lidar Digitizer
For radar and lidar receiver digitizers, the LTC2226HLU#PBF offers 25 Msps sampling with 90 dB SFDR to capture short-pulse returns at baseband. Its no-missing-codes-over-temperature specification preserves time-domain integrity across automotive temperature ranges from -40 °C to +125 °C. Differential inputs reject common-mode noise from switching power stages nearby, and shutdown/nap modes enable duty-cycled operation to reduce average system power between pulse trains. A matched impedance transformer between the IF amp and the ADC input preserves SFDR. Designers should isolate the ADC analog section from the digital FPGA with a ground cutout and stitch the planes at a single point near AVdd.
Recommandé
Industrial Test Instrumentation
In benchtop data acquisition and modular instruments (PXI, LXI), the LTC2226HLU#PBF provides 25 Msps 12-bit acquisition per channel with 71.4 dB SNR for vibration analysis and spectrum measurements. The flexible reference - internal or external - lets calibration routines inject an external precision reference for self-test, while the parallel CMOS output simplifies FPGA-based capture logic. The 32-TQFP 5x5 mm footprint is friendly to dense multi-channel boards where multiple ADCs share a common clock distribution tree. Add a 100 ohm source termination at each digital output to control edge rates into the FPGA, limiting ringing on busses longer than 25 mm.
Recommandé
Software Defined Radio (SDR)
For software defined radio receivers, the LTC2226HLU#PBF digitizes IF stages at 25 Msps with sufficient bandwidth for narrowband and wideband digital demodulation. The duty-cycle-stabilized clock input accepts FPGA-generated clocks without jitter penalty, simplifying SDR clock tree design. Shutdown and nap modes reduce average current in listen-only SDR devices where the radio samples sparsely. The flexible 1 Vp-p to 2 Vp-p input range allows direct interface from common SDR front-end chipsets. Use a bandpass filter between the mixer and the ADC to prevent aliasing of out-of-band signals into the digitized IF bandwidth.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour LTC2226HLU#PBF — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | LTC2227HLU#PBF | LTC2246HLU#PBF | LTC2228HLU#PBF |
|---|---|---|---|---|
| Brand | Analog Devices (Linear Technology legacy) | Analog Devices | Analog Devices | Analog Devices |
| Package | 32-TQFP (5x5 mm) | 32-TQFP (5x5) - same | 32-TQFP (5x5) - same | 32-TQFP (5x5) - same |
| Resolution | 12 bits | 12 bits | 14 bits | 12 bits |
| Sample Rate | 25 Msps | 40 Msps | 25 Msps | 65 Msps |
| Supply Voltage | 3 V (2.8 V to 3.5 V) | 3 V | 3 V | 3 V |
| Input Type | Differential / Single-ended | Differential / Single-ended | Differential / Single-ended | Differential / Single-ended |
| Lead-Free / RoHS | Yes (#PBF) | Yes (#PBF) | Yes (#PBF) | Yes (#PBF) |
Principaux différenciateurs
- Pin-compatible family member (12-bit / 25 Msps tier) (vs LTC2227HLU#PBF)
- Upgrade path to higher resolution on same footprint (vs LTC2246HLU#PBF)
- Automotive-grade screening on #PBF variant (vs LTC2226HLU (non-#PBF))
Notes de conception
Route analog input traces as a 100 ohm differential pair with continuous ground reference on the layer below. According to the LTC2226 datasheet, keep the analog input trace length under 10 mm and place the input RC network within 3 mm of the AIN+/AIN- pins to preserve the 575 MHz full-power bandwidth and the 90 dB SFDR rating.
Decouple AVdd with a 0.1 µF X7R ceramic placed within 5 mm of the pin plus a 10 µF tantalum bulk capacitor at the board entry. For OVdd, use a separate 0.1 µF ceramic and a small ferrite bead in series with the AVdd rail to break digital switching noise coupling into the analog section. According to the LTC2226 datasheet, AVdd range is 2.8 V to 3.5 V; do not exceed 3.5 V or the internal reference drifts.
Do not leave the REFT and REFB pins floating - each requires a 0.1 µF ceramic to AGND, with REFOUT optionally driving an external reference through a buffer. According to the LTC2226 datasheet, missing decoupling on these reference pins degrades INL and DNL by 1-2 LSB. Also ensure the SHDN pin is tied high through a 100 kohm resistor for normal operation, or the ADC enters shutdown mode unexpectedly.
Add a 22 ohm series termination resistor at each digital output (D0-D11, OF) within 5 mm of the chip to control edge rates into the FPGA. According to the LTC2226 datasheet, output edge rates approach 1 ns; without termination, long parallel busses ring and couple back into the analog input via the package substrate, degrading SFDR by 5-10 dB.
Informations de conformité
RoHS compliance indicated by the #PBF suffix per Linear Technology / Analog Devices part numbering convention. Halogen-free status not explicitly stated in retrieved web data; set to unknown. Automotive screening level appears in distributor records but is not equivalent to AEC-Q100 qualification for the LTC2226 family.
