PIC18F25Q10T-I/STX - 32KB Flash 8-bit MCU, 28-VQFN | Microchip
Référence : PIC18F25Q10T-I/STX ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $1.51 | $1,51 |
| 10 | $1.42 | $14,20 |
| 100 | $1.18 | $118,00 |
| 500 | $0.97 | $485,00 |
| 1 000 | $0.86 | $860,00 |
PIC18F25Q10T-I/STX Présentation
What is an 8-bit PIC microcontroller? PIC microcontrollers are RISC-based, Harvard-architecture microcontrollers from Microchip that integrate CPU core, non-volatile Flash, SRAM, EEPROM and configurable peripherals on a single die. The PIC18 family extends the original PIC16 instruction set with 16-bit instructions, linear addressing, and a C-friendly compiler toolchain (MPLAB XC8). The PIC18F25Q10 belongs to the PIC18-Q10 sub-family, which adds Core Independent Peripherals (CIPs), Configurable Logic Cells (CLCs), and 5 V analog operation for noise immunity in industrial environments.
Key features include a 10-bit ADC with Computation (ADC2) supporting capacitive voltage divider (CVD) touch sensing, a 5-bit DAC, two comparators, a Complementary Waveform Generator (CWG), and a Windowed Watchdog Timer (WWDT). The CIP set (CLC, NCO, PWM, CWG, HLT) lets designers offload timing-critical state machines from the CPU. eXLP technology delivers nanoWatt sleep currents, and the 64 MHz core yields 16 MIPS sustained throughput. The device exposes 25 digital I/O lines, supports up to two I2C, two SPI and two UART channels, and integrates an 8-bit parallel port.
In real-time control and sensor-node applications, the PIC18F25Q10 balances deterministic latency, low power and analog density. The ADC2 with hardware averaging and threshold detection enables direct connection to resistive or capacitive sensors without an external op-amp. Hardware CIPs run control loops in silicon, freeing the core to sleep, which extends battery life. Compared with Cortex-M0+ parts at the same price, the PIC18-Q10 is favoured where 5 V noise tolerance, robust I/O and a long-stable toolchain matter more than raw MHz.
Typical applications include sensor nodes, low-power IoT edge devices, capacitive touch user interfaces, BLDC motor control helpers, LED lighting controllers, and small industrial control boards. Designers benefit from MPLAB X IDE, MPLAB Code Configurator (MCC), and a free MPLAB XC8 compiler.
A key design tip is to keep VDD decoupling within 5 mm of the pins: a 100 nF X7R plus a 1 µF X5R cap is the minimum, and the CVD reference capacitor should be a low-drift C0G/NP0 part for stable touch baselines.
This page synthesises real-time distributor pricing, verified same-package drop-in alternatives and practical design notes that are not collected in the manufacturer datasheet.
Alternatives de remplacement direct pour PIC18F25Q10T-I/STX — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC18F25Q10T-I/STX (même facteur de forme et même empreinte) — différant par ADC, Operating Temperature, Core Architecture, Program Memory (Flash), Comparators.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC18F25Q10-I/STX
✅ Remplacement direct✓ En stock
$1.58 / unité
Voir la fiche technique →PIC18F24Q10-I/STX
✅ Remplacement direct✓ En stock
$1.45 / unité
Voir la fiche technique →PIC18F24Q10T-I/STX
✅ Remplacement direct✓ En stock
$1.35 / unité
Voir la fiche technique →PIC18F25Q10T-I/STX Valeurs maximales et caractéristiques électriques
| Core | PIC18 (8-bit RISC, 16-bit instructions) |
| Series | PIC® XLP™ 18Q |
| Maximum CPU Frequency | 64 MHz (16 MIPS) |
| Program Memory (Flash) | 32 KB (32K x 8) |
| Data SRAM | 2 KB |
| EEPROM | 256 bytes |
| Supply Voltage (VDD) | 1.8 V to 5.5 V |
| Température de fonctionnement | -40 °C to +85 °C (Industrial) |
| I/O Pins | 25 |
| ADC | 10-bit ADC2 with Computation (CVD, averaging, oversampling) |
| DAC | 5-bit |
| Comparators | 2 |
| Timers / PWM / CWG | Multiple 8/16-bit timers, PWM, Complementary Waveform Generator |
| Communication Peripherals | 2x I2C, 2x SPI, 2x UART (EUSART) |
| Boîtier | 28-pin VQFN (4x4 mm) |
| Type de montage | Surface Mount |
| Statut RoHS | Compliant |
Configuration des broches de PIC18F25Q10T-I/STX
| Broche 1 | RA5/SS1/T0CKI1/ICSPCLK — GPIO / SPI SS / Timer0 clock / ICD clock |
| Broche 2 | RA4/T1G/SDO2/CLKR — GPIO / Timer1 gate / SPI2 SDO / clock reference |
| Broche 3 | RA3/T1CKI/SS2/CCP2 — GPIO / Timer1 clock / SPI2 SS / CCP2 PWM |
| Broche 4 | RA2/AN2/C2IN+ — GPIO / analog input / comparator2 non-inverting input |
| Broche 5 | RA1/AN1/C1IN0-/C2IN0- — GPIO / analog input / comparator inputs |
| Broche 6 | RA0/AN0/C1IN+/DAC1OUT/INT0 — GPIO / analog input / comparator1 in / DAC1 / external interrupt |
| Broche 7 | VSS — Ground reference |
| Broche 8 | VDD — Positive supply 1.8-5.5 V |
| Broche 9 | RB7/AN21/CCP1/KBI1 — GPIO / analog input / CCP1 PWM / keyboard interrupt |
| Broche 10 | RB6/AN20/KBI0 — GPIO / analog input / keyboard interrupt |
| Broche 11 | RB5/AN19/CWG1D/CCP3 — GPIO / analog input / CWG output / CCP3 PWM |
| Broche 12 | RB4/AN18/CWG2D/CCP4 — GPIO / analog input / CWG output / CCP4 PWM |
| Broche 13 | RB3/AN17/CWG3D/CCP5 — GPIO / analog input / CWG output / CCP5 PWM |
| Broche 14 | RB2/AN16/CWG1C/SDO1 — GPIO / analog input / CWG / SPI1 SDO |
| Broche 15 | RB1/AN15/C1IN3-/SCL1 — GPIO / analog input / comparator1 / I2C1 SCL |
| Broche 16 | RB0/AN12/C2IN1+/FLT0/SDA1 — GPIO / analog input / comparator2 / fault input / I2C1 SDA |
| Broche 17 | RA7/OSC1/CLKIN — GPIO / crystal oscillator input / external clock |
| Broche 18 | RA6/OSC2/CLKOUT — GPIO / crystal oscillator output / clock out |
| Broche 19 | RC0/SOSCIN/SCL2 — GPIO / secondary oscillator in / I2C2 SCL |
| Broche 20 | RC1/SOSCO/SDO2 — GPIO / secondary oscillator out / SPI2 SDO |
| Broche 21 | RC2/AN14/CCP1/T0CKI — GPIO / analog input / CCP1 / Timer0 clock |
| Broche 22 | RC3/AN13/SCK1/SCL2 — GPIO / analog input / SPI1 clock / I2C2 SCL |
| Broche 23 | RC4/AN11/SDI1/SDA2 — GPIO / analog input / SPI1 SDI / I2C2 SDA |
| Broche 24 | RC5/AN10/SDO1 — GPIO / analog input / SPI1 SDO |
| Broche 25 | RC6/AN8/CK1/TX1 — GPIO / analog input / UART1 clock / UART1 TX |
| Broche 26 | RC7/AN9/DT1/RX1 — GPIO / analog input / UART1 data / UART1 RX |
| Broche 27 | RE3/MCLR/VPP — Master clear reset / programming voltage |
| Broche 28 | VSS — Ground reference |
Applications typiques
PIC18F25Q10T-I/STX convient pour 6 applications: Industrial Sensor Nodes, Capacitive Touch User Interfaces, BLDC Fan and Pump Controllers, LED Lighting Drivers, Battery-Powered IoT Edge Devices, Small Appliance Control Boards.
Industrial Sensor Nodes
The PIC18F25Q10T-I/STX fits industrial sensor nodes because its 1.8-5.5 V supply range accepts 24 V-bus-derived rails after regulation, while its 10-bit ADC2 with Computation automates averaging and thresholding on resistive bridge sensors. The XLP nanoWatt sleep mode and Hardware Limit Timer (HLT) let the part sleep between samples, drawing under 1 µA. Designers wire the device directly to a 4-20 mA loop, run CIP state machines for alarm hysteresis, and still ship firmware updates through UART over RS-485 without an external transceiver.
Recommandé
Capacitive Touch User Interfaces
Capacitive touch UIs rely on the PIC18F25Q10T-I/STX's ADC2 with built-in Capacitive Voltage Divider (CVD) support, which performs automatic baseline tracking and oversampling in hardware. The 32 KB Flash holds Microchip's mTouch CVD library, while the 5-bit DAC can drive a haptic feedback driver. The 28-VQFN (4x4 mm) fits behind a 0.5 mm overlay and the CLCs handle wake-on-touch without waking the CPU, reducing average current to a few µA in standby.
Recommandé
BLDC Fan and Pump Controllers
Small BLDC fan and pump controllers benefit from the PIC18F25Q10T-I/STX's Complementary Waveform Generator (CWG), 10-bit ADC2 and Hall-sensor input. The CWG produces complementary PWM with dead-band insertion for the gate driver, while ADC2 samples back-EMF for sensorless startup. With 32 KB Flash and 16 MIPS throughput, a 6-step or FOC starter fits in firmware, and the 5 V tolerance removes the need for a level shifter to MOSFET gate drivers.
Recommandé
LED Lighting Drivers
Architectural and signage LED lighting controllers use the PIC18F25Q10T-I/STX for digital dimming and colour-mixing loops. The 16-bit PWM, 10-bit ADC for photo-sensor feedback and 5-bit DAC for analog dimming drive a constant-current LED driver over a 0-10 V or DALI interface. The XLP sleep current (~50 nA typical) enables battery-backup emergency luminaires, and the 1.8 V minimum VDD supports single-cell LiFePO4 packs.
Recommandé
Battery-Powered IoT Edge Devices
Battery-powered IoT edge devices running sensor fusion and BLE beaconing benefit from the PIC18F25Q10T-I/STX's nanoWatt XLP modes (sleep current < 1 µA), Windowed Watchdog Timer (WWDT) and 64 MHz wake-up speed. The 32 KB Flash holds a small RTOS or state-machine scheduler, and the 256-byte EEPROM stores calibration constants across battery swaps. UART peripherals can drive an external BLE or LoRa module without an extra level translator because I/O are 5 V tolerant.
Recommandé
Small Appliance Control Boards
Small appliance controllers (coffee machines, blenders, washing machines) deploy the PIC18F25Q10T-I/STX because of its 5 V noise immunity, 25 GPIO and built-in CIPs. The CLCs combine timer outputs for triac firing, while the comparators sense zero-cross and motor over-current. The 32 KB Flash accommodates a USB-CDC bootloader for service updates, and the 28-VQFN (4x4) keeps the PCB small enough for in-appliance enclosures.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC18F25Q10T-I/STX — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC18F25Q10-I/STX | PIC18F24Q10-I/STX | PIC18F24Q10T-I/STX |
|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-VQFN (4x4) | 28-VQFN (4x4) - same | 28-VQFN (4x4) - same | 28-VQFN (4x4) - same |
| Flash | 32 KB | 32 KB | 16 KB (-50%) | 16 KB (-50%) |
| SRAM | 2 KB | 2 KB | 1 KB (-50%) | 1 KB (-50%) |
| EEPROM | 256 B | 256 B | 256 B | 256 B |
| Max Frequency | 64 MHz (16 MIPS) | 64 MHz | 64 MHz | 64 MHz |
| I/O Pins | 25 | 25 | 25 | 25 |
| ADC | 10-bit ADC2 with CVD | 10-bit ADC2 with CVD | 10-bit ADC2 with CVD | 10-bit ADC2 with CVD |
| Operating Voltage | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V |
| Temperature Grade | -40 to +85 °C (Industrial) | -40 to +85 °C | -40 to +85 °C | -40 to +85 °C |
Principaux différenciateurs
- XLP nanoWatt technology for sub-µA sleep (vs PIC18F25K80T-I/SS)
- ADC2 with CVD for touch and averaging (vs PIC18F24Q10-I/STX)
- 5 V tolerance on all I/O (vs PIC18F25K83T-I/MX)
Notes de conception
Place a 100 nF X7R decoupling capacitor within 5 mm of every VDD/AVDD/VBAT pin and a 1 µF X5R bulk cap on the main VDD rail. For ADC2 accuracy, add a separate 100 nF C0G cap on AVDD because the ADC2 module draws brief bursts during conversion. The internal LDO regulator does not require an external bypass on Q10 devices. Estimated quiescent current in sleep mode is below 1 µA at 3 V per datasheet (DS40001945C).
The 28-VQFN (4x4 mm) package has a theta_JA around 35-40 C/W on a standard 2-layer JEDEC test board. At 64 MHz and 5 V, the core current stays under 10 mA so self-heating is negligible. For high-temperature environments, expand the GND copper pour under the EP and stitch thermal vias to the bottom layer to keep junction temperature inside the 85 °C industrial limit.
Route the CVD sense traces as short guarded differential pairs, with a ground flood and C0G/NP0 reference capacitors on the dedicated CVD pins. Avoid crossing noise sources such as the CWG outputs; if crossing is unavoidable, route the CWG traces on the opposite side of a continuous ground plane. Place the quartz crystal within 5 mm of OSC1/OSC2, with load capacitors to ground.
Do not assume that the un-programmed device will run from the internal oscillator at full 64 MHz - the default HFINTOSC is 1 MHz until the OSCCON register is reconfigured. The MCLR pin must be tied to VDD through a 10 kΩ pull-up or left configured as an input-only pin to avoid spurious resets. CIP configuration (CLC, NCO, CWG) must be done before peripherals are enabled.
Informations de conformité
RoHS and lead-free status per Microchip product page; halogen-free status not published - set to unknown; AEC-Q100 grade not qualified for automotive; choose AEC-Q100 versions such as PIC18F25Q10-E/STX (extended) for harsh environments.
