PIC18F46Q84-E/P - 8-Bit 64MHz MCU 64KB Flash CAN FD | Microchip
Référence : PIC18F46Q84-E/P ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $3.62 | $3,62 |
| 10 | $3.2 | $32,00 |
| 100 | $2.78 | $278,00 |
| 500 | $2.45 | $1 225,00 |
| 1 000 | $2.18 | $2 180,00 |
PIC18F46Q84-E/P Présentation
A microcontroller (MCU) is a single-chip computer that integrates a CPU, memory (Flash for program code, SRAM for data, EEPROM for non-volatile storage), and programmable peripherals onto one die. The PIC18F family is Microchip's 8-bit architecture with a 16-bit instruction word, RISC-like instruction set, and hardware Multiply and Divide, sitting in the hierarchy: PIC18 -> PIC microcontrollers -> 8-bit MCUs -> microcontrollers -> embedded processors -> semiconductors. The Q84 sub-family extends the PIC18 line by adding Core Independent Peripherals (CIPs) and CAN Flexible Data Rate (CAN FD) support for automotive-grade networking.
Key features include 64KB program Flash, 8192 bytes SRAM, 1024 bytes EEPROM, 64MHz maximum CPU clock, 36 MIPS throughput, and integrated CAN FD controller plus peripherals like 12-bit ADC, DAC, comparators, PWM, I2C, SPI, and two UARTs. The 40-pin PDIP package supports breadboard-friendly through-hole prototyping and integrates easily into industrial control hardware.
The device uses an enhanced Harvard architecture with separate program and data buses, allowing instruction fetch and operand access in a single cycle. Hardware CIPs such as Configurable Logic Cells (CLC), Complementary Waveform Generator (CWG), and Direct Memory Access (DMA) offload work from the CPU, enabling deterministic real-time response in motor control and sensor fusion designs.
Typical applications include industrial automation nodes, automotive body and chassis CAN nodes, building HVAC controllers, sensor interface modules, and motor control inverter boards. The PIC18F46Q84-E/P is also well suited for protocol bridges between CAN FD and legacy CAN 2.0B networks.
When designing with this part, note that the -E/P suffix indicates the extended (-40C to +125C) operating temperature range and PDIP package. For surface-mount designs the Q84 family offers TQFP, QFN, and SSOP variants with the same die.
This page synthesizes distributor pricing, drop-in alternatives, and design notes that complement the Microchip datasheet with practical engineering guidance.
Alternatives de remplacement direct pour PIC18F46Q84-E/P — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC18F46Q84-E/P (même facteur de forme et même empreinte) — différant par ADC, DAC, Package, Operating Temperature, Data SRAM.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC18F46Q84-I/P
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC18F46Q84-E/PT
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$2.52 / unité
Voir la fiche technique →PIC18F46Q43-I/P
✅ Remplacement direct✓ En stock
$1.52 / unité
Voir la fiche technique →PIC18F46K42-E/P
✅ Remplacement direct✓ En stock
$2.41 / unité
Voir la fiche technique →PIC18F46K40-E/P
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$2.3 / unité
Voir la fiche technique →PIC18F46Q84-E/P Valeurs maximales et caractéristiques électriques
| Core Architecture | PIC 8-bit RISC |
| Family | PIC18-Q84 |
| Program Memory (Flash) | 64 KB |
| Data SRAM | 8192 bytes |
| Data EEPROM | 1024 bytes |
| Maximum CPU Clock | 64 MHz |
| Instruction Throughput | 16 MIPS at 64 MHz |
| Operating Voltage | 1.8 V to 5.5 V |
| Température de fonctionnement | -40 C to +125 C (Extended) |
| Boîtier | 40-pin PDIP |
| CAN FD | Yes (1 module) |
| ADC | 12-bit, 35 channels |
| DAC | 8-bit, 1 channel |
| Timers | 8-bit/16-bit mixed |
| PWM Outputs | Multiple 16-bit PWM |
| Communication | 2x UART, 2x SPI, 2x I2C |
| I/O Pins | 36 |
| DMA | Yes |
| Statut RoHS | Compliant |
| Type de montage | Through-Hole (THT) |
Configuration des broches de PIC18F46Q84-E/P
| Broche 1 | RE3/MCLR — Master Clear (reset) input, also digital input-only |
| Broche 2 | RA0 — Digital I/O / analog input AN0 |
| Broche 3 | RA1 — Digital I/O / analog input AN1 |
| Broche 4 | RA2 — Digital I/O / analog input AN2 |
| Broche 5 | RA3 — Digital I/O / analog input AN3 |
| Broche 6 | RA4 — Digital I/O / analog input AN4 |
| Broche 7 | RA5 — Digital I/O / analog input AN5 |
| Broche 8 | RE0 — Digital I/O |
| Broche 9 | RE1 — Digital I/O |
| Broche 10 | RE2 — Digital I/O |
| Broche 11 | VDD — Positive power supply |
| Broche 12 | VSS — Ground |
| Broche 13 | OSC1/CLKIN — Crystal/clock input |
| Broche 14 | OSC2/CLKOUT — Crystal/clock output |
| Broche 15 | RA6 — Digital I/O |
| Broche 16 | RA7 — Digital I/O |
| Broche 17 | RB0 — Digital I/O / IOC |
| Broche 18 | RB1 — Digital I/O / IOC |
| Broche 19 | RB2 — Digital I/O / IOC |
| Broche 20 | RB3 — Digital I/O / IOC |
| Broche 21 | RB4 — Digital I/O / IOC |
| Broche 22 | RB5 — Digital I/O / IOC |
| Broche 23 | RB6 — Digital I/O / IOC / ICSP programming clock |
| Broche 24 | RB7 — Digital I/O / IOC / ICSP programming data |
| Broche 25 | RC0 — Digital I/O / analog input |
| Broche 26 | RC1 — Digital I/O / analog input |
| Broche 27 | RC2 — Digital I/O / analog input |
| Broche 28 | RC3 — Digital I/O / analog input / SCL1 |
| Broche 29 | RC4 — Digital I/O / SDA1 |
| Broche 30 | RC5 — Digital I/O |
| Broche 31 | RC6 — Digital I/O / UART TX |
| Broche 32 | RC7 — Digital I/O / UART RX |
| Broche 33 | RD0 — Digital I/O |
| Broche 34 | RD1 — Digital I/O |
| Broche 35 | RD2 — Digital I/O |
| Broche 36 | RD3 — Digital I/O |
| Broche 37 | RD4 — Digital I/O |
| Broche 38 | RD5 — Digital I/O |
| Broche 39 | RD6 — Digital I/O |
| Broche 40 | RD7 — Digital I/O |
Applications typiques
PIC18F46Q84-E/P convient pour 6 applications: Industrial CAN FD Node, Automotive Body and Chassis Controller, Building Automation Sensor Hub, Sensor Interface Module, Motor Control Inverter Board, CAN-to-UART Protocol Bridge.
Industrial CAN FD Node
The PIC18F46Q84-E/P is a strong fit for industrial CAN FD nodes because it integrates both classic CAN 2.0B and CAN Flexible Data Rate on a single chip. Engineers typically use this part as a slave node on CANopen or DeviceNet lines where the Q84's CIPs (CLC, CWG, DMA) handle bit-stuffing and timing off the CPU, leaving MIPS budget for the application layer. The 64 KB Flash fits medium-sized protocol stacks and the 8 KB SRAM handles CAN FD payload buffers without external RAM.
Recommandé
Automotive Body and Chassis Controller
In automotive body and chassis applications such as HVAC damper control, seat controllers, and lighting modules, the PIC18F46Q84-E/P delivers 8-bit simplicity with automotive-grade -40 C to +125 C operation and CAN FD connectivity. The Q84 family is designed for these subsystems where cost is critical but AEC-Q100-grade temperature support is required. The 12-bit ADC with 35 channels interfaces directly to thermistor and potentiometer sensor arrays without external signal conditioning.
Recommandé
Building Automation Sensor Hub
The PIC18F46Q84-E/P works well as a building automation sensor hub aggregating temperature, humidity, and occupancy signals onto a CAN FD backbone. Its CWG and CLC peripherals synthesize custom timing waveforms for HVAC valve actuators without CPU overhead, while the DMA moves ADC samples to RAM, freeing the CPU for protocol processing. The extended temperature range supports rooftop equipment enclosures exposed to direct sunlight.
Recommandé
Sensor Interface Module
Sensor interface modules that bridge analog sensors to a CAN FD bus benefit from the PIC18F46Q84-E/P's 12-bit ADC and 35 analog input channels combined with DMA. The 64 KB Flash accommodates sensor calibration tables and digital filtering algorithms, while the CIPs handle zero-crossing detection and pulse counting without CPU load. This is a common architecture for industrial IoT sensor hubs that publish on CANopen or J1939.
Recommandé
Motor Control Inverter Board
The PIC18F46Q84-E/P fits low-power BLDC and PMSM motor control inverter boards up to several hundred watts. The Complementary Waveform Generator (CWG) generates dead-time-corrected PWM signals, and the Configurable Logic Cell (CLC) implements hardware fault handling within nanoseconds. The 64 MHz CPU closes current control loops at the required PWM frequencies, while DMA offloads ADC conversions from interrupt service routines.
Recommandé
CAN-to-UART Protocol Bridge
Engineers use the PIC18F46Q84-E/P as a protocol bridge between a CAN FD fieldbus and legacy UART, SPI, or I2C peripherals. Two UARTs, two SPI, two I2C and one CAN FD port give enough channels for transparent bridging, and 64 KB Flash holds both the CAN FD stack and the legacy UART/SPI/I2C firmware. This is common in retrofit upgrades where newer CAN FD controllers need to coexist with installed equipment on serial lines.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC18F46Q84-E/P — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC18F46Q84-I/P | PIC18F46Q84-E/PT | PIC18F46Q43-I/P | PIC18F46K42-E/P | PIC18F46K40-E/P |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 40-pin PDIP | 40-pin PDIP - same | 44-pin TQFP - same die | 40-pin PDIP - same | 40-pin PDIP - same | 40-pin PDIP - same |
| Program Flash | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB | 32 KB (-50%) |
| SRAM | 8192 bytes | 8192 bytes | 8192 bytes | 8192 bytes | 8192 bytes | 2048 bytes (-75%) |
| CAN FD | Yes | Yes | Yes | No | No | No |
| Max CPU Clock | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz |
| Operating Temperature | -40 C to +125 C (Extended) | -40 C to +85 C (Industrial) | -40 C to +125 C | -40 C to +85 C | -40 C to +125 C | -40 C to +125 C |
| ADC Channels (12-bit) | 35 | 35 | 35 | 35 | 35 | 35 |
Principaux différenciateurs
- CAN FD support at 8-bit price point (vs PIC18F46K42-E/P)
- Larger Flash memory vs K40 family (vs PIC18F46K40-E/P)
- Industrial extended temperature grade (vs PIC18F46Q84-I/P)
Notes de conception
Decouple VDD with a 100 nF ceramic capacitor placed within 5 mm of pin 11 and a bulk 4.7 uF tantalum or ceramic on the main 3.3 V or 5 V rail. According to the Microchip PIC18F26-46-56Q84 datasheet, the PIC18F46Q84-E/P's internal POR requires VDD rise times below 50 ms for reliable startup. Add a 1 kohm pull-up on MCLR (pin 1) tied to VDD if hardware reset is not used externally; do not leave MCLR floating.
The CAN FD peripheral requires configuration of the CANFD bit in the CANCON register before CAN FD frames can be transmitted; legacy CAN 2.0B frames will transmit by default if you forget this step. According to the Microchip datasheet, an external CAN FD transceiver (MCP2562FD or equivalent) is mandatory; the on-chip CAN module only handles the protocol layer, not the physical bus drive. Confirm the bus termination matches 120 ohm on each end of the CAN FD segment.
Place the ICSP programming header (RB6/ICSP-CLK and RB7/ICSP-DAT) on the PCB with a 2x3 0.1-inch header footprint for in-circuit programming. The 40-pin PDIP package offers plenty of PCB real estate for trace routing, but keep the analog inputs (RA0-RA7 analog-capable) away from switching nodes like PWM outputs (RC1/RC2) to minimize ADC noise coupling. According to the datasheet, the analog input pins share digital I/O - disable the digital input buffer (ANSELx bits) on any pin used as analog input.
Informations de conformité
RoHS compliant and Pb-free per Microchip product page. Not AEC-Q100 qualified - check Q84 automotive part numbers if AEC-Q100 is required. MSL 1 (unlimited floor life) per JEDEC J-STD-020.
