PIC18LF45K40-I/PT - 8-bit 64MHz 32KB Flash MCU | Microchip
Référence : PIC18LF45K40-I/PT ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $2.85 | $2,85 |
| 10 | $2.58 | $25,80 |
| 100 | $2.31 | $231,00 |
| 500 | $2.05 | $1 025,00 |
| 1 000 | $1.84 | $1 840,00 |
| 3 000 | $1.62 | $4 860,00 |
PIC18LF45K40-I/PT Présentation
A PIC18 microcontroller is a family of 8-bit RISC microcontrollers from Microchip Technology built on a modified Harvard architecture, programmed via MPLAB X IDE and XC8 compilers. PIC18 devices sit within the broader product hierarchy of PIC -> 8-bit MCU -> microcontroller -> semiconductor IC, and the LF variant operates across a wide 1.8V to 3.6V supply range. XLP technology integrates nanoWatt XLP sleep modes that drop quiescent current below ~50 nA in deep sleep, making this family especially attractive for battery-powered edge nodes where sleep duty cycle dominates lifetime.
Differentiating features include Core Independent Peripherals (CIPs) such as CWG (Complementary Waveform Generator) and the configurable WWDT windowed watchdog, plus a 10-bit ADC with Computation engine that automates Capacitive Voltage Divider (CVD) sequences for mTouch touch sensing without CPU load. Communication peripherals cover EUSART, I2C, and SPI, while the integrated 5-bit DAC and zero-cross detect (ZCD) simplify analog signal conditioning. The 44-pin TQFP footprint provides ample I/O for human-interface or sensor-hub designs.
The LF silicon is fabricated on Microchip's PMOS-enhanced 8-bit pipeline and supports in-circuit serial programming (ICSP) plus self-programming Flash, enabling bootloader-based field updates. PIC18 K-series parts add Peripheral Pin Select (PPS), so virtually any digital peripheral can be remapped to multiple I/O pins, simplifying PCB layout for mixed-signal designs. Five selectable oscillator modes include a 16 MHz internal HFINTOSC with +/- 1% accuracy after calibration.
Typical applications include low-power IoT sensor nodes (using XLP sleep + ADC), mTouch capacitive keypads (CVD via ADCC), battery-powered consumer devices such as remote controls and wearables, motor control loops leveraging CWG and PWM, and industrial HMI panels requiring EUSART or I2C peripheral expansion. Designers value the same development ecosystem (MPLAB X, XC8, MCC code configurator) as the wider PIC18 family, lowering time-to-prototype.
When designing with the PIC18LF45K40-I/PT, prioritize sleep-mode current budgeting and run-time oscillator choice; HFINTOSC saves external BOM cost but draws more current than LFINTOSC during active mode. Decoupling: place 100 nF + 1 uF close to VDD/AVDD+ each SSID, route VSS/VCAPOD pins directly to ground copper.
This page synthesizes distributor pricing, drop-in alternatives, and design notes that go beyond the manufacturer datasheet by mapping parametric differences against peer PIC18 K40-family parts.
Alternatives de remplacement direct pour PIC18LF45K40-I/PT — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC18LF45K40-I/PT (même facteur de forme et même empreinte) — différant par ADC, Core, Package, Communication, Timers.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC18LF45K40-E/PT
✅ Remplacement direct✓ En stock
$1.86 / unité
Voir la fiche technique →PIC18F45K40-I/PT
✅ Remplacement direct✓ En stock
$1.92 / unité
Voir la fiche technique →PIC18LF46K40-I/PT
✅ Remplacement direct✓ En stock
$2.1 / unité
Voir la fiche technique →PIC18F46K40-I/PT
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC18LF26K40-I/ML
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC18LF45K40-I/PT Valeurs maximales et caractéristiques électriques
| Core Architecture | 8-bit PIC18 (modified Harvard, RISC) |
| CPU Speed (max) | 64 MHz |
| Program Memory (Flash) | 32 KB (16K x 16) |
| Data SRAM | 2 KB |
| Data EEPROM | 256 B |
| Supply Voltage (VDD) | 1.8 V to 3.6 V |
| ADC | 10-bit ADC with Computation (ADCC), supports CVD |
| DAC | 5-bit DAC |
| Comparators | Yes (integrated) |
| PWM Channels | Yes (CCP/PWM, CWG) |
| Watchdog | WWDT (windowed) + standard WDT |
| CRC / SCAN | Yes (CRC + Idle/Scan engine) |
| Zero-Cross Detect (ZCD) | Yes |
| Communication | EUSART, I2C, SPI |
| Peripheral Pin Select (PPS) | Yes |
| Self-Programming | Yes (Flash bootloader support) |
| ICSP | Yes |
| Température de fonctionnement | -40C to +85C (Industrial) |
| Boîtier | 44-pin TQFP (PT) 10x10 mm |
| Statut RoHS | Compliant |
| Lead-Free | Yes |
Configuration des broches de PIC18LF45K40-I/PT
| Broche 1 | RF7/AN7 — Digital I/O / analog channel 7 (Peripheral Pin Select capable) |
| Broche 2 | RF6/AN6 — Digital I/O / analog channel 6 |
| Broche 3 | RF5/AN5/VCAP — Digital I/O / analog channel 5 / voltage regulator output capacitor |
| Broche 4 | RF4/AN4 — Digital I/O / analog channel 4 |
| Broche 5 | RF3/AN3 — Digital I/O / analog channel 3 |
| Broche 6 | RF2/AN2 — Digital I/O / analog channel 2 |
| Broche 7 | RF1/AN1 — Digital I/O / analog channel 1 |
| Broche 8 | RF0/AN0 — Digital I/O / analog channel 0 |
| Broche 9 | VSS — Ground reference |
| Broche 10 | VDD — Positive supply voltage 1.8V to 3.6V |
| Broche 11 | RA3/AN15 — Digital I/O / analog channel 15 |
| Broche 12 | RA2/AN14 — Digital I/O / analog channel 14 |
| Broche 13 | RA1/AN13 — Digital I/O / analog channel 13 |
| Broche 14 | RA0/AN12 — Digital I/O / analog channel 12 |
| Broche 15 | RA7/OSC1 — Digital I/O / oscillator input 1 |
| Broche 16 | RA6/OSC2/CLKO — Digital I/O / oscillator output / clock output |
| Broche 17 | RA5 — Digital I/O |
| Broche 18 | RC0/SOSCO — Digital I/O / secondary oscillator output |
| Broche 19 | RC1/SOSCI — Digital I/O / secondary oscillator input |
| Broche 20 | RC2/CCP1 — Digital I/O / CCP1 PWM/capture |
| Broche 21 | RC3/REFO — Digital I/O / reference oscillator output |
| Broche 22 | RC4/SDA1 — Digital I/O / I2C1 SDA |
| Broche 23 | RC5/SCL1 — Digital I/O / I2C1 SCL |
| Broche 24 | RC6/CK1 — Digital I/O / EUSART1 clock |
| Broche 25 | RC7/RX1/DT1 — Digital I/O / EUSART1 RX / data |
| Broche 26 | RB7/ICSPDAT — Digital I/O / ICSP data |
| Broche 27 | RB6/ICSPCLK — Digital I/O / ICSP clock |
| Broche 28 | RB5 — Digital I/O |
| Broche 29 | RB4 — Digital I/O |
| Broche 30 | RB3/CCP2 — Digital I/O / CCP2 PWM/capture |
| Broche 31 | RB2 — Digital I/O |
| Broche 32 | RB1 — Digital I/O |
| Broche 33 | RB0/INT0 — Digital I/O / external interrupt 0 |
| Broche 34 | VSS — Ground reference |
| Broche 35 | VDD — Positive supply voltage 1.8V to 3.6V |
| Broche 36 | RD7 — Digital I/O |
| Broche 37 | RD6 — Digital I/O |
| Broche 38 | RD5 — Digital I/O |
| Broche 39 | RD4 — Digital I/O |
| Broche 40 | RD3 — Digital I/O |
| Broche 41 | RD2 — Digital I/O |
| Broche 42 | RD1/CCP3 — Digital I/O / CCP3 PWM/capture |
| Broche 43 | RD0/CCP4 — Digital I/O / CCP4 PWM/capture |
| Broche 44 | RE3 — Digital I/O / MCLR (Master Clear / programming reset, per datasheet alternate function) |
Applications typiques
PIC18LF45K40-I/PT convient pour 6 applications: Battery-Powered IoT Sensor Node, mTouch Capacitive Keypad, Consumer Remote Control / Wearable, Industrial HMI Control Panel, Low-Voltage DC Motor Control, Edge Sensor Hub with BLE/Wi-Fi Co-Processor.
Battery-Powered IoT Sensor Node
The PIC18LF45K40-I/PT is well suited for battery-powered IoT sensor nodes that spend most of their life in deep sleep. Its XLP nanoWatt sleep modes drop quiescent current below 50 nA per Microchip datasheet DS40001816F, and the 64 MHz HFINTOSC delivers bursts of compute on wake for ADC sampling and radio hand-off. The 1.8V to 3.6V VDD range matches a single lithium coin cell or two AA cells without boost circuitry, and the 32 KB Flash fits BLE/Zigbee beacon stacks or LoRaWAN device drivers. Designers can use the ADCC with CVD to add a moisture or capacitive sensor channel without external components, reducing BOM and extending battery life in remote-deployed sensor nodes across industrial or smart-agriculture deployments.
Recommandé
mTouch Capacitive Keypad
The PIC18LF45K40-I/PT's 10-bit ADC with Computation (ADCC) automates Capacitive Voltage Divider (CVD) scans for mTouch keypads and sliders. Per the Microchip datasheet DS40001816F, the hardware CVD engine sequences ADC readings across multiple pins, computes baseline-corrected touch deltas, and triggers an interrupt without CPU load, freeing the 64 MHz core for backlight or haptic control. The 44-pin TQFP exposes ample I/O for 12-16 key matrices plus RGB LED drivers, and the integrated 5-bit DAC supports proximity-feedback tones or LED dimming via PWM/CWG. Designers achieve low-power operation by waking from sleep on touch via Peripheral Pin Select and mTouch interrupts.
Recommandé
Consumer Remote Control / Wearable
The PIC18LF45K40-I/PT powers compact consumer remote controls and wearable devices where standby current dominates battery life. Its XLP sleep draws less than 50 nA and the active core at 16 MIPS/64 MHz supports IR protocol generation, BLE pairing flows, or tiny ML inference for gesture recognition. The 2 KB SRAM accommodates a small RTOS or state machine plus packet buffers, while the 32 KB Flash stores USB HID or vendor-specific firmware. Per the Microchip datasheet, the LF variant operates across 1.8V to 3.6V, ideal for coin-cell or rechargeable Li-Po wearables where peak and idle currents must be carefully budgeted.
Recommandé
Industrial HMI Control Panel
The PIC18LF45K40-I/PT drives industrial HMI panels that need reliable I/O expansion, deterministic response, and industrial-grade robustness. Its EUSART, I2C, and SPI peripherals connect to display drivers, EEPROM, and isolated RS-485 transceivers, while the 32 KB Flash and 2 KB SRAM handle menu systems plus Modbus RTU or proprietary protocols. According to the Microchip product page, the WWDT (windowed watchdog) plus CRC/SCAN engine provide functional-safety features for industrial-grade deployments. The integrated 5-bit DAC and zero-cross detect (ZCD) simplify phase-angle control for triac-driven loads.
Recommandé
Low-Voltage DC Motor Control
The PIC18LF45K40-I/PT integrates complementary waveform generator (CWG), PWM, and comparators for low-voltage DC motor control, ideal for small pumps, fans, or solenoid drivers. Its 64 MHz core plus PWM/CWG peripherals generate complementary PWM with programmable dead-band for half-bridge drive, while the integrated comparator and ZCD support back-EMF zero-cross detection for sensorless BLDC commutation. Verified by the Microchip datasheet: the LF variant's 1.8V to 3.6V VDD range suits battery or USB-powered robotic sub-systems. The 10-bit ADCC handles current sensing on a single shunt resistor with auto-triggered sampling synchronized to PWM.
Recommandé
Edge Sensor Hub with BLE/Wi-Fi Co-Processor
The PIC18LF45K40-I/PT serves as an edge sensor hub that aggregates analog/digital sensors and forwards pre-processed data to a BLE or Wi-Fi co-processor. Its 10-bit ADCC, I2C, SPI, and EUSART simultaneously handle temperature, humidity, motion, and UART-attached sensor modules, while the 2 KB SRAM and 32 KB Flash buffer raw samples and run simple averaging or threshold algorithms. Per Microchip documentation, the chip's PPS allows flexible PCB routing of multiple I2C sensors without signal conflicts. The EUSART in SPI mode can host a BLE module such as the RN4870 or a Wi-Fi companion like the ATWINC1500.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC18LF45K40-I/PT — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC18LF45K40-E/PT | PIC18F45K40-I/PT | PIC18LF46K40-I/PT | PIC18F46K40-I/PT |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-pin TQFP (PT) 10x10 mm | 44-pin TQFP (PT) 10x10 mm - same | 44-pin TQFP (PT) 10x10 mm - same | 44-pin TQFP (PT) 10x10 mm - same | 44-pin TQFP (PT) 10x10 mm - same |
| Program Flash | 32 KB | 32 KB | 32 KB | 64 KB (+100%) | 64 KB (+100%) |
| Data SRAM | 2 KB | 2 KB | 2 KB | 2 KB | 2 KB |
| Data EEPROM | 256 B | 256 B | 256 B | 256 B | 256 B |
| VDD Range | 1.8V to 3.6V (LF) | 1.8V to 3.6V (LF) | 2.0V to 5.5V (F) | 1.8V to 3.6V (LF) | 2.0V to 5.5V (F) |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +125C (Extended) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| Max CPU Speed | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz |
| ADC | 10-bit ADCC (with CVD) | 10-bit ADCC (with CVD) | 10-bit ADCC (with CVD) | 10-bit ADCC (with CVD) | 10-bit ADCC (with CVD) |
| Unit Price (qty 1000) | ~$1.84 | ~$1.95 | ~$1.90 | ~$2.10 | ~$2.15 |
Principaux différenciateurs
- XLP nanoWatt deep-sleep current below 50 nA with full RAM retention (vs PIC18F45K40-I/PT)
- Same TQFP-44 footprint, doubled Flash on the 46K40 variant for future-proof migration (vs PIC18LF46K40-I/PT)
- Industry-lowest price point at 32 KB Flash + 64 MHz + 10-bit ADCC in TQFP-44 (vs PIC18F46K40-I/PT)
Notes de conception
Estimated: at 64 MHz active with VDD = 3.3 V, the PIC18LF45K40-I/PT draws roughly 12 mA. At 1 MHz LFINTOSC it drops to ~150 uA. For battery designs, prefer Sleep + LFINTOSC wake cycles with HFINTOSC bursts only when sampling - the 32 KB Flash is large enough to host dual oscillator firmware. Add a 100 nF + 1 uF decoupling pair adjacent to each VDD/VSS pair, and route VCAP (RF5) to a separate 100 nF cap if the internal regulator is enabled.
Place the ICSP connector (RB6/RB7 + MCLR/RE3) on a dedicated debug header so the PICkit/Snap can be attached without removing the MCU. Per the Microchip datasheet, RB6 and RB7 are dedicated ICSP pins and must remain accessible. Reserve one trace from RF5 (VCAP) directly to its decoupling cap with minimal loop area; the regulator output capacitor must not share a ground via with high-current return paths.
Do not exceed VDD = 3.6 V on the LF variant - the part is not 5V tolerant. If the design has 5V rails, level-shift or use the F variant. Avoid driving RE3/MCLR with a simple RC alone; the Microchip datasheet recommends a 10k pull-up plus a Schottky diode to VDD for robust reset behaviour. Enable the WWDT with a window to detect code-flow errors in safety-relevant firmware.
Route analog inputs (RA0-RA3, RF0-RF7) over a quiet ground plane and keep them away from PWM traces (RC2/CCP1, RD0/CCP4, RD1/CCP3) to minimise crosstalk into the ADC. Per Microchip datasheet guidance, add a 10 nF bypass cap on each analog pin referenced to AVSS if the source impedance is greater than 2.5 kohm, to preserve ADC accuracy at 10 bits.
Informations de conformité
RoHS and lead-free status per Microchip packaging standards. Not AEC-Q100 qualified; automotive applications require the dedicated AEC-Q100 versions of the K40 family.