PIC18LF8628-I/PT - 96KB Flash 8-bit MCU, 80-pin TQFP | Microchip
Référence : PIC18LF8628-I/PT ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $6 | $6,00 |
| 10 | $5.5 | $55,00 |
| 100 | $5.1 | $510,00 |
| 500 | $4.7 | $2 350,00 |
| 1 000 | $4.2 | $4 200,00 |
PIC18LF8628-I/PT Présentation
An 8-bit microcontroller (MCU) is a programmable computation engine built around an 8-bit data path, ROM/Flash for program storage, RAM for data, and a fixed set of on-chip peripherals (ADC, timers, UART/SPI/I2C, PWM). The PIC18 family is Microchip's high-pin-count, register-rich 8-bit line positioned between baseline PIC10/12/16 and 16-bit dsPIC/PIC24 architectures; the LF sub-family adds nanoWatt XLP technology for battery-friendly sleep currents. Within Microchip's hierarchy, PIC18 sits under: 8-bit PIC MCU -> PIC18 -> PIC18F/LF66K/67K/86K/87K -> PIC18LF8628.
Key features of the PIC18LF8628 include 96 KB self-programmable Flash with block-erase support, 4 KB SRAM, 1024-byte non-volatile Data EEPROM for parameter storage, a 12-bit A/D converter with up to 16 input channels, multiple capture/compare/PWM modules, two MSSP ports for SPI or I2C, two USART modules with LIN support, an enhanced CCP, an LCD segment driver interface option in related parts, and nanoWatt XLP sleep modes drawing microamp-level standby current. The wide operating voltage (2.0-3.6V) and 70+ I/O pins simplify interface to large human-machine or sensor arrays.
Internally, the PIC18LF8628 uses an enhanced Harvard architecture with separate program and data buses plus a 16-bit instruction word. An 8x8 hardware multiplier and 16-bit barrel-style instruction pipeline accelerate C-compiled code relative to baseline PIC16 devices. Internal oscillator blocks and the PLL allow flexible clocking from a 32 kHz secondary source up to 40 MHz, while the XLP power-management unit gates peripherals individually for deep-sleep operation.
Typical applications include industrial automation controllers, HVAC and building-management panels, large-format user-interface and keypad/display nodes, automotive accessory modules, point-of-sale terminals, sensor-fusion aggregators, and any battery-backed instrumentation requiring non-volatile parameter retention (Data EEPROM) alongside substantial program memory.
When designing with the PIC18LF8628, prioritize decoupling per the Microchip PIC18F8723/8628 family datasheet and budget for in-circuit serial programming (ICSP) header pins. The Data EEPROM endurance is rated for 100k erase/write cycles - exceed only with wear-leveling in firmware.
This page combines verified distributor pricing (as of 2026-09-29), drop-in same-family alternatives, and practical design notes not consolidated in the manufacturer datasheet PDF.
Alternatives de remplacement direct pour PIC18LF8628-I/PT — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC18LF8628-I/PT (même facteur de forme et même empreinte) — différant par ADC, I/O Pins, Package, Program Memory (Flash), Core Architecture.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC18LF8723-I/PT
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC18LF6680-I/PT
✅ Remplacement direct✓ En stock
$12.85 / unité
Voir la fiche technique →PIC18LF8527-I/PT
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC18LF4585-I/PT
✅ Remplacement direct✓ En stock
$6.34 / unité
Voir la fiche technique →PIC18LF8628-I/PT Valeurs maximales et caractéristiques électriques
| Program Memory (Flash) | 96 KB |
| Data SRAM | 4 KB |
| Data EEPROM | 1024 bytes |
| CPU Core | PIC18 (8-bit enhanced Harvard) |
| Maximum CPU Clock | 40 MHz |
| Operating Voltage (VDD) | 2.0 V to 3.6 V |
| ADC | 12-bit, multi-channel |
| I/O Pins | 70+ (depends on peripheral allocation) |
| Boîtier | TQFP-80 (PT), 12x12 mm |
| Temperature Grade | Industrial (-40C to +85C) |
| Serial Interfaces | 2x USART (LIN-capable), 2x MSSP (SPI/I2C) |
| Timers | Multiple 8/16-bit timers with gate control |
| CCP/ECCP Modules | Yes (Capture/Compare/PWM, Enhanced CCP) |
| Parallel Slave Port | Yes |
| Low-Power Feature | nanoWatt XLP technology |
| In-Circuit Programming | ICSP via 2-wire PGC/PGD |
| Statut RoHS | Compliant |
Configuration des broches de PIC18LF8628-I/PT
| Broche 1 | OSC1/CLKI/RA7 — Oscillator input / external clock / GPIO port A bit 7 |
| Broche 2 | OSC2/CLKO/RA6 — Oscillator output / GPIO port A bit 6 |
| Broche 3 | RA0/AN0 — GPIO port A bit 0 / ADC input 0 |
| Broche 4 | RA1/AN1 — GPIO port A bit 1 / ADC input 1 |
| Broche 5 | RA2/AN2/VREF- — GPIO port A bit 2 / ADC input 2 / ADC negative reference |
| Broche 6 | RA3/AN3/VREF+ — GPIO port A bit 3 / ADC input 3 / ADC positive reference |
| Broche 7 | RA4/T0CKI — GPIO port A bit 4 / Timer0 clock input |
| Broche 8 | RA5/AN4 — GPIO port A bit 5 / ADC input 4 |
| Broche 9 | RE0/RD — GPIO port E bit 0 / Parallel Slave Port read strobe |
| Broche 10 | RE1/WR — GPIO port E bit 1 / Parallel Slave Port write strobe |
| Broche 11 | RE2/CS — GPIO port E bit 2 / Parallel Slave Port chip select |
| Broche 12 | VDD — Positive supply voltage (2.0-3.6V) |
| Broche 13 | VSS — Ground reference |
| Broche 14 | RB0/INT0/FLT0 — GPIO port B bit 0 / External interrupt 0 / PWM fault input |
| Broche 15 | RB1/INT1 — GPIO port B bit 1 / External interrupt 1 |
| Broche 16 | RB2/INT2 — GPIO port B bit 2 / External interrupt 2 |
| Broche 17 | RB3/INT3 — GPIO port B bit 3 / External interrupt 3 |
| Broche 18 | RB4/KBI0 — GPIO port B bit 4 / Keyboard interrupt 0 |
| Broche 19 | RB5/KBI1 — GPIO port B bit 5 / Keyboard interrupt 1 |
| Broche 20 | RB6/KBI2/PGC — GPIO port B bit 6 / Keyboard interrupt 2 / ICSP clock |
| Broche 21 | RB7/KBI3/PGD — GPIO port B bit 7 / Keyboard interrupt 3 / ICSP data |
| Broche 22 | RC0/T1OSO/T1CKI — GPIO port C bit 0 / Timer1 oscillator output / Timer1 clock |
| Broche 23 | RC1/T1OSI/CCP2 — GPIO port C bit 1 / Timer1 oscillator input / CCP2 |
| Broche 24 | RC2/CCP1 — GPIO port C bit 2 / CCP1 output |
| Broche 25 | RC3/SCK1/SCL1 — GPIO port C bit 3 / MSSP1 SPI clock / I2C clock |
| Broche 26 | RC4/SDI1/SDA1 — GPIO port C bit 4 / MSSP1 SPI data in / I2C data |
| Broche 27 | RC5/SDO1 — GPIO port C bit 5 / MSSP1 SPI data out |
| Broche 28 | RC6/TX1/CK1 — GPIO port C bit 6 / USART1 TX / USART1 clock |
| Broche 29 | RC7/RX1/DT1 — GPIO port C bit 7 / USART1 RX / USART1 data |
| Broche 30 | RD0/PSP0 — GPIO port D bit 0 / Parallel Slave Port data bit 0 |
| Broche 31 | RD1/PSP1 — GPIO port D bit 1 / Parallel Slave Port data bit 1 |
| Broche 32 | RD2/PSP2 — GPIO port D bit 2 / Parallel Slave Port data bit 2 |
| Broche 33 | RD3/PSP3 — GPIO port D bit 3 / Parallel Slave Port data bit 3 |
| Broche 34 | RD4/PSP4 — GPIO port D bit 4 / Parallel Slave Port data bit 4 |
| Broche 35 | RD5/PSP5 — GPIO port D bit 5 / Parallel Slave Port data bit 5 |
| Broche 36 | RD6/PSP6 — GPIO port D bit 6 / Parallel Slave Port data bit 6 |
| Broche 37 | RD7/PSP7 — GPIO port D bit 7 / Parallel Slave Port data bit 7 |
| Broche 38 | VSS — Ground reference |
| Broche 39 | VDD — Positive supply voltage (2.0-3.6V) |
| Broche 40 | RF0/AN5 — GPIO port F bit 0 / ADC input 5 |
| Broche 41 | RF1/AN6 — GPIO port F bit 1 / ADC input 6 |
| Broche 42 | RF2/AN7 — GPIO port F bit 2 / ADC input 7 |
| Broche 43 | RF3/AN8 — GPIO port F bit 3 / ADC input 8 |
| Broche 44 | RF4/AN9 — GPIO port F bit 4 / ADC input 9 |
| Broche 45 | RF5/AN10/CVREF — GPIO port F bit 5 / ADC input 10 / comparator voltage reference |
| Broche 46 | RF6/AN11 — GPIO port F bit 6 / ADC input 11 |
| Broche 47 | RF7/AN12/SS1 — GPIO port F bit 7 / ADC input 12 / MSSP1 SPI slave select |
| Broche 48 | RG0 — GPIO port G bit 0 |
| Broche 49 | RG1 — GPIO port G bit 1 |
| Broche 50 | RG2 — GPIO port G bit 2 |
| Broche 51 | RG3 — GPIO port G bit 3 |
| Broche 52 | RG4 — GPIO port G bit 4 |
| Broche 53 | MCLR/VPP — Master clear reset / programming voltage input |
| Broche 54 | RH0 — GPIO port H bit 0 |
| Broche 55 | RH1 — GPIO port H bit 1 |
| Broche 56 | RH2 — GPIO port H bit 2 |
| Broche 57 | RH3 — GPIO port H bit 3 |
| Broche 58 | RH4 — GPIO port H bit 4 |
| Broche 59 | RH5 — GPIO port H bit 5 |
| Broche 60 | RH6 — GPIO port H bit 6 |
| Broche 61 | RH7 — GPIO port H bit 7 |
| Broche 62 | RJ0 — GPIO port J bit 0 |
| Broche 63 | RJ1 — GPIO port J bit 1 |
| Broche 64 | RJ2 — GPIO port J bit 2 |
| Broche 65 | RJ3 — GPIO port J bit 3 |
| Broche 66 | RJ4 — GPIO port J bit 4 |
| Broche 67 | RJ5 — GPIO port J bit 5 |
| Broche 68 | RJ6 — GPIO port J bit 6 |
| Broche 69 | RJ7 — GPIO port J bit 7 |
| Broche 70 | RK0 — GPIO port K bit 0 |
| Broche 71 | RK1 — GPIO port K bit 1 |
| Broche 72 | RK2 — GPIO port K bit 2 |
| Broche 73 | RK3 — GPIO port K bit 3 |
| Broche 74 | RK4 — GPIO port K bit 4 |
| Broche 75 | RK5 — GPIO port K bit 5 |
| Broche 76 | RK6 — GPIO port K bit 6 |
| Broche 77 | RK7 — GPIO port K bit 7 |
| Broche 78 | VSS — Ground reference |
| Broche 79 | VDD — Positive supply voltage (2.0-3.6V) |
| Broche 80 | AVDD — Analog supply voltage (tie to VDD) |
Applications typiques
PIC18LF8628-I/PT convient pour 7 applications: Industrial Automation Controller, HVAC Building-Management Panel, Large-Format User-Interface / Keypad Display, Automotive Accessory Module, Point-of-Sale Terminal, Battery-Backed Sensor Aggregator, Smart Home IoT Bridge Node.
Industrial Automation Controller
The PIC18LF8628-I/PT fits industrial automation controllers with its 96 KB Flash for state-machine logic, 4 KB RAM for data buffering, and 70+ I/O pins for sensor-actuator fan-out. The 12-bit ADC handles analog transducer inputs while two USART modules support RS-232/485 Modbus links. The LF 2.0-3.6V supply simplifies 24V-to-3.3V regulator designs common in factory PLC racks.
Recommandé
HVAC Building-Management Panel
The PIC18LF8628-I/PT serves HVAC panels because its 96 KB Flash accommodates multi-zone scheduling tables, 1024-byte Data EEPROM retains setpoints across power cycles without external EEPROM, and nanoWatt XLP sleep keeps standby current under 1 uA on battery backup. Multiple CCP modules drive TRIAC phase-angle control for damper actuators and the 12-bit ADC reads thermistor/resistive sensor bridges with 0.1 C resolution.
Recommandé
Large-Format User-Interface / Keypad Display
The PIC18LF8628-I/PT drives large keypads and character/graphic displays thanks to its 70+ I/O count, parallel slave port for off-loading display refresh to a host controller, and 4 KB RAM for buffer memory. The MSSP/SPI modules support direct drive of OLED/ST7565 LCD controllers while the 12-bit ADC reads potentiometer/touch sliders. The TQFP-80 footprint gives PCB designers ample GPIO without external I/O expanders.
Recommandé
Automotive Accessory Module
The PIC18LF8628-I/PT works in non-safety automotive accessories (interior lighting controllers, seat-heater panels, dash-top displays) using its LIN-capable USART, PWM modules for LED dimming, and wide -40C to +85C industrial temperature grade. Note that for AEC-Q100 automotive-grade certification, designers should pick the PIC18F8628-I/PT automotive variant instead, since the LF8628-I/PT is industrial-grade only.
Recommandé
Point-of-Sale Terminal
The PIC18LF8628-I/PT is well-suited to point-of-sale (POS) terminals as the keypad/scanner I/O controller because 96 KB Flash handles multi-protocol command parsers, 4 KB RAM buffers encrypted packets, and 1024-byte Data EEPROM retains merchant-config tables. The 12-bit ADC reads battery telemetry and two USARTs connect to printer and Ethernet modules; nanoWatt XLP keeps backup battery drain minimal.
Recommandé
Battery-Backed Sensor Aggregator
The PIC18LF8628-I/PT functions as a battery-backed sensor aggregator where the LF variant's nanoWatt XLP sleep modes drop current to microamp levels between sensor reads, 1024-byte Data EEPROM logs calibration constants across battery swaps, and 4 KB RAM aggregates raw sensor data before transmission via USART or MSSP. The wide 2.0-3.6V VDD lets it run from a single 3.6V lithium primary cell without a boost regulator.
Recommandé
Smart Home IoT Bridge Node
The PIC18LF8628-I/PT serves as a smart-home bridge node because its dual USART (LIN-capable) and dual MSSP (SPI/I2C) handle simultaneous sensor and radio links, 96 KB Flash implements Zigbee/Z-Wave/BLE command stacks, and the 12-bit ADC reads analog sensor inputs (lux, gas, thermistor). The TQFP-80 footprint provides enough GPIO to fan out to multiple radio modules plus a TFT display for local status.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC18LF8628-I/PT — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC18LF8723-I/PT | PIC18LF6680-I/PT | PIC18LF8527-I/PT | PIC18LF4585-I/PT |
|---|---|---|---|---|---|
| Package | TQFP-80 (PT) | TQFP-80 (PT) - same | TQFP-80 (PT) - same | TQFP-80 (PT) - same | TQFP-80 (PT) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 96 KB | 128 KB (+33%) | 80 KB (-17%) | 48 KB (-50%) | 48 KB (-50%) |
| RAM | 4 KB | 8 KB (+100%) | 2 KB (-50%) | 4 KB (same) | 4 KB (same) |
| Operating Voltage | 2.0V to 3.6V | 2.0V to 3.6V | 2.0V to 3.6V | 2.0V to 3.6V | 2.0V to 3.6V |
| Max Clock | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
| ADC | 12-bit | 12-bit | 12-bit | 12-bit | 12-bit |
| Data EEPROM | 1024 bytes | 1024 bytes | 1024 bytes | 1024 bytes | 1024 bytes |
| nanoWatt XLP | Yes | Yes | Yes | Yes | Yes |
Principaux différenciateurs
- Lowest-voltage LF variant in 80-pin TQFP family (vs PIC18F8628-I/PT)
- Larger Flash and RAM than PIC18LF6680-I/PT sibling (vs PIC18LF6680-I/PT)
- Smaller Flash than PIC18LF8723-I/PT but same TQFP-80 footprint (vs PIC18LF8723-I/PT)
Notes de conception
Estimated: at 40 MHz with VDD=3.3V and all peripherals active, typical IDD is approximately 15-20 mA per the PIC18F6x2/8x2 family datasheet. For battery applications, place the MCU in Sleep mode (IDD ~0.1-1 uA with nanoWatt XLP) between sensor reads and use Timer1 with a 32.768 kHz crystal as the wake source. Decouple each VDD/VSS pair with a 100 nF ceramic capacitor within 5 mm of the pin; bulk capacitance of 10 uF is recommended near the regulator output.
Route the ICSP lines PGC (RB6) and PGD (RB7) with short, parallel traces and a 4.7 kohm pull-up on MCLR/VPP to ensure reliable in-circuit programming. Place the 32.768 kHz low-frequency oscillator crystal within 5 mm of OSC1/OSC2 with guard ring to ground. The analog AVSS/AVDD pair should be star-routed back to a clean reference point and decoupled separately from digital VDD.
Configuration bits must be set correctly: enable the internal oscillator only if external clocking is not used, and disable the watchdog timer if not required by application logic (or enable WDT with a long postscaler). Forgetting to set CONFIG3L's voltage regulator configuration can cause intermittent brown-out reset behavior. Always include a 4.7 kohm pull-up on MCLR and a series resistor on PGD/PGC to limit inrush current during ICSP. Data EEPROM write endurance is rated for 100,000 erase/write cycles - implement firmware wear-leveling for parameter logs.
Informations de conformité
RoHS and lead-free compliant per Microchip product page; conflict minerals statement filed November 2018 per package change PCN. Industrial temperature grade only - not AEC-Q100 qualified.