10AX115N4F40I3SG vs 10AX115N4F45E3LG तुलना
विस्तृत दोनों ओर की तुलना 10AX115N4F40I3SG द्वारा Intel और 10AX115N4F45E3LG द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | 10AX115N4F40I3SG | 10AX115N4F45E3LG |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | Arria 10 GX | Arria 10 GX |
| Logic Elements (LE) | 1,150,000 | 1,150,000 |
| Adaptive Logic Modules (ALM) | [DATA_NEEDED: ALM count] | 427,200 |
| Embedded Memory Bits | 68,857,856 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | 3,376 (variable-precision, 18x19 multipliers) |
| Maximum User I/O | 600 | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Maximum Transceiver Data Rate | 17.4 Gbps | — |
| Process Node | 20 nm | — |
| पैकेज | 1517-BBGA, FCBGA (F40), 40 x 40 mm, 1.00 mm pitch | 1932-ball FCBGA (F45, 45x45 mm) |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount (BGA) |
| ऑपरेटिंग तापमान | -40C to +100C (Industrial) | Extended (E) industrial grade per ordering code |
| Supply Voltage (Core) | [DATA_NEEDED: VCC core voltage] | — |
| Configuration | Serial, Parallel, and Avalon-ST supported | — |
| MSL स्तर | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL rating] |
| RoHS स्थिति | Compliant | Compliant |
| Hardened IP | PCIe Gen3, 100G Ethernet MAC (per Quartus IP library) | — |
| Device Family Position | Mid-range 20 nm transceiver FPGA | — |
| Embedded Memory | — | 68,857,856 bits (8,532 Kbits per M20K block) |
| Maximum User I/O Pins | — | 768 |
| Transceivers | — | Up to 96 channels at up to 17.4 Gbps |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore |
| Memory Interfaces | — | DDR4, DDR3, QDR-IV, RLDRAM III (hard controller) |
| PCIe Hard IP | — | PCIe Gen3 x8 (hard IP block) |
| PLLs | — | 24 |
| Process Technology | — | TSMC 20nm |
| Voltage Rails | — | Core 0.9 V, transceiver 1.0/1.1 V, I/O bank-dependent |