5CSEBA2U23I7SN vs 5CSEBA2U23A7N तुलना
विस्तृत दोनों ओर की तुलना 5CSEBA2U23I7SN द्वारा Intel और 5CSEBA2U23A7N द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
5CSEBA2U23I7SN - Cyclone V SE SoC FPGA, 25K LE, Dual ARM Cortex-A9 | Intel
5CSEBA2U23I7SN ✓ सक्रियविशेषता तुलना
| पैरामीटर | 5CSEBA2U23I7SN | 5CSEBA2U23A7N |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 25K (approximately) | 25,000 LE |
| Hard Processor | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Processor Maximum Frequency | 800 MHz | — |
| पैकेज | 672-UBGA (23x23 mm) | 672-UBGA (23x23 mm) |
| Pin/Ball Count | 672 | — |
| I/O Count | 188 (per manufacturer listing) | — |
| Process Technology | 28 nm low-power (TSMC) | 28 nm low-power |
| Operating Temperature Grade | Industrial (-40C to +100C, I7 suffix) | — |
| Supply Voltage Maximum | 1.13 V (per partstack listing) | — |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS स्थिति | Compliant | Compliant (per ampheo listing) |
| MSL स्तर | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| DSP Blocks | Variable-precision DSP blocks | Variable-precision DSP (count [DATA_NEEDED: exact count]) |
| Memory Blocks | M10K embedded memory blocks | — |
| PLLs | On-chip phase-locked loops | Fractional PLLs (count [DATA_NEEDED: exact PLL count]) |
| HPS Peripherals | USB 2.0 OTG, Gigabit Ethernet, DDR3 controller, SPI, I2C, UART | — |
| MPN Code | — | 5CSEBA2U23A7N (Cyclone V SE A2, U23 package) |
| Hard Processor System (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 700 MHz |
| User I/O | — | 188 |
| Speed Grade | — | 7 |
| Temperature Grade | — | A (Commercial, 0C to +85C) [DATA_NEEDED: exact junction range] |
| Operating Voltage (Core) | — | 1.1 V (typical FPGA core, multi-rail HPS) |
| Configuration Scheme | — | HPS-boot of FPGA fabric via configuration QSPI |
| Embedded Memory | — | M10K blocks (count [DATA_NEEDED: exact M10K/M20K count]) |