AFS600-FGG484K vs M1AFS600-1FGG484K तुलना
विस्तृत दोनों ओर की तुलना AFS600-FGG484K द्वारा Microchip Technology और M1AFS600-1FGG484K द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
AFS600-FGG484K - 600K-Gate Mixed-Signal FPGA | Microchip
AFS600-FGG484K ✓ सक्रियMicrochip Technology
M1AFS600-1FGG484K - Fusion FPGA 600K Gates 484-BGA | Microchip
M1AFS600-1FGG484K ✓ सक्रियविशेषता तुलना
| पैरामीटर | AFS600-FGG484K | M1AFS600-1FGG484K |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Device Type | Fusion mixed-signal FPGA | — |
| System Gates | 600,000 gates | 600K |
| Logic Elements | 13,824 logic elements | [DATA_NEEDED: logic element count] |
| User I/O | 172 I/O | 172 |
| सप्लाई वोल्टेज | 1.5 V | — |
| Process Technology | 130 nm CMOS | — |
| Metal Layers | 7 metal layers | — |
| Configuration Memory | Flash-based nonvolatile configuration | On-chip flash (single-chip, instant-on) |
| Power-Up Behavior | Live at Power-Up (LAPU) | — |
| पैकेज | 484-ball BGA | 484-pin FBGA (FGG484) |
| Ball Pitch | 1.0 mm | — |
| माउंटिंग प्रकार | Surface mount | Surface Mount |
| ऑपरेटिंग तापमान | 0°C to 70°C | [DATA_NEEDED: operating temperature range] |
| Logic Family | CMOS | — |
| Analog Capability | Configurable on-chip analog resources | — |
| Clock Support | Comprehensive clock generation and management circuitry | — |
| Programming Retention | Retains programmed configuration when powered off | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Family | — | Fusion (M1 series) |
| Total Flash Configuration Bits | — | 110592 |
| Embedded Processor | — | ARM Cortex-M1 (M1 variant) |
| Technology | — | 130 nm flash-based CMOS |
| Core Voltage | — | 1.5 V |
| Max Frequency | — | 1282.05 MHz (family reference) |
| Analog Peripherals | — | Configurable analog blocks (Fusion architecture) |
| Clock Management | — | Integrated clock generation and management circuitry |
| Speed Grade | — | -1 |
| Packaging Option | — | Tray (K suffix) |