CS5330A-KSZ vs CS5330A-BSZR तुलना
विस्तृत दोनों ओर की तुलना CS5330A-KSZ द्वारा Cirrus Logic Inc. और CS5330A-BSZR द्वारा Cirrus Logic Inc.. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Cirrus Logic Inc.
CS5330A-KSZ - 18-Bit Stereo Sigma-Delta ADC, 50kS/s, SOIC-8 | Cirrus Logic
CS5330A-KSZ ObsoleteCirrus Logic Inc.
CS5330A-BSZR - 18-Bit Stereo Sigma-Delta ADC, 8-SOIC | Cirrus Logic (Tape & Reel)
CS5330A-BSZR ✓ सक्रियविशेषता तुलना
| पैरामीटर | CS5330A-KSZ | CS5330A-BSZR |
|---|---|---|
| ब्रांड | Cirrus Logic Inc. | Cirrus Logic Inc. |
| श्रेणी | ADC/DAC | ADC/DAC |
| लाइफसाइकिल स्थिति | Obsolete | सक्रिय |
| Manufacturer | Cirrus Logic | Cirrus Logic |
| Part Number | CS5330A-KSZ | CS5330A-BSZR |
| Product Family | CS5330A / CS5331A | — |
| फ़ंक्शन | Stereo Analog-to-Digital Converter (ADC) | Stereo Analog-to-Digital Converter (ADC) |
| ADC Architecture | Sigma-Delta (Delta-Sigma) | — |
| रेज़ोल्यूशन | 18 bit | 18 bit |
| Number of Channels | 2 (Stereo - L/R) | 2 (stereo, left + right) |
| Input Type | Single-Ended Analog | — |
| Output Sample Rate | 2 kHz to 50 kHz (continuously adjustable) | 2 kHz to 50 kHz, continuously adjustable |
| Dynamic Range | 94 dB | 94 dB |
| Passband Ripple | 0.05 dB | 0.05 dB to 21.7 kHz |
| Stopband Rejection | >80 dB | >80 dB |
| सप्लाई वोल्टेज | +5 V single supply | Single +5 V (3.6 V to 4.4 V analog input range relative to reference) |
| Supply Current / Power | 150 mW (typical operation) | 150 mW typical during normal operation |
| ऑपरेटिंग तापमान | -40 C to +85 C | -40 C to +85 C (industrial) |
| पैकेज | SOIC-8 (KS) | 8-pin SOIC |
| पिन काउंट | 8 | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Lead Free (per DigiChip specification) | — |
| Screening Level | Industrial | Industrial |
| Data Interface | Serial | — |
| Filter Type | Linear-phase digital anti-alias (internal) | — |
| Anti-Alias Filter | Integrated (no external RC required) | Integrated linear-phase digital anti-alias filter |
| Architecture | — | Sigma-Delta (multi-bit modulator with digital decimation) |
| Number of ADC Inputs | — | 2 single-ended |
| Output Format | — | Serial, left-justified |
| Lead Finish | — | Lead Free |
| RoHS स्थिति | — | Lead-free, compliant (per SOIC-8 LF designation) |