EP1C20F400C7N vs EP1C20F400I6 तुलना
विस्तृत दोनों ओर की तुलना EP1C20F400C7N द्वारा Altera और EP1C20F400I6 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP1C20F400C7N | EP1C20F400I6 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | Obsolete |
| Series | Cyclone | — |
| Family | Cyclone I | Cyclone FPGA |
| Logic Elements (LE) | 20,060 | — |
| Logic Array Blocks (LABs) | 2,006 | — |
| Embedded Memory (bits) | 294,912 (288 Kbits, M4K blocks) | — |
| User I/O Count | 301 | — |
| Embedded 18x18 Multipliers | 52 | — |
| PLLs | 4 | — |
| Process Technology | 130 nm CMOS (SRAM-based) | 130 nm SRAM |
| Core Voltage | 1.5 V | 1.5 V |
| Speed Grade | -7 (commercial, ~405 MHz internal) | — |
| ऑपरेटिंग तापमान | 0 °C to +85 °C (commercial) | — |
| पैकेज | 400-ball FineLine BGA (FBGA) | 400-ball FineLine BGA (FBGA-400) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Configuration Interface | Active Serial (AS) / Passive Serial (PS) / JTAG | — |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (via 8 I/O banks) | — |
| External Memory Support | DDR SDRAM, QDR SRAM, FCRAM | — |
| RoHS स्थिति | Compliant (per Altera product page) | [DATA_NEEDED: RoHS status] |
| Logic Elements | — | 20,060 |
| Maximum User I/O | — | 301 |
| Embedded RAM | — | 288 Kbits (M4K blocks) |
| PLL Blocks | — | 2 |
| Embedded Multipliers | — | [DATA_NEEDED: multiplier count] |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Ball Pitch | — | [DATA_NEEDED: ball pitch] |
| Maximum Frequency | — | 405.2 MHz |
| Configuration Schemes | — | Passive Serial, Active Serial, JTAG |
| Supported I/O Standards | — | LVTTL, LVCMOS, LVDS, SSTL-2, SSTL-3 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSL स्तर | — | [DATA_NEEDED: MSL level] |