EP1K30TC144-3 vs EP1K30TC144-2 तुलना
विस्तृत दोनों ओर की तुलना EP1K30TC144-3 द्वारा Intel और EP1K30TC144-2 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP1K30TC144-3 | EP1K30TC144-2 |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Series | ACEX-1K | — |
| Logic Elements / Cells | 1,728 | 1,728 |
| Total RAM Bits | 24,576 | — |
| Number of LABs/CLBs | 216 | — |
| Typical Gates | 30,000 | — |
| Maximum System Gates | 56,000 | — |
| Number of User I/O | 102 | — |
| Number of Logic Array Blocks | 216 | — |
| Supply Voltage (Core) | 2.5 V | — |
| I/O Voltage Standard | 2.5 V LVCMOS / LVTTL (MultiVolt up to 5.0 V tolerant) | — |
| Process Technology | 0.22 µm SRAM | 0.22 µm SRAM LUT |
| Operating Temperature (Commercial) | 0C to +70C | 0C to +70C |
| पैकेज | 144-LQFP / 144-TQFP (22x22 mm, 0.5 mm pitch) | 144-pin TQFP (TC) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Speed Grade | -3 (slowest speed bin) | -2 (mid commercial speed grade) |
| Configuration Method | Serial configuration device (EPC2/EPC8 compatible) | Passive Serial / JTAG / EPC1/EPC2 PROM |
| Boundary Scan | IEEE 1149.1 JTAG compliant | — |
| Number of Global Clocks | 8 | — |
| RoHS स्थिति | [DATA_NEEDED: rohs status from datasheet] | [DATA_NEEDED: RoHS status] |
| Family | — | ACEX 1K |
| System Gates | — | 30,000 |
| Logic Array Blocks (LABs) | — | 216 |
| User I/Os | — | 102 |
| Embedded Array Blocks (EABs) | — | 6 |
| Total EAB Memory | — | 24,576 bits |
| Core Supply Voltage (VCCINT) | — | 2.5 V (2.375 V - 2.625 V) |
| I/O Supply Voltage (VCCIO) | — | 3.3 V (LVTTL/LVCMOS), 2.5 V, or PCI |
| Maximum Internal Clock Frequency | — | 200 MHz |
| MSL स्तर | — | [DATA_NEEDED: MSL level] |