EP20K1500CF33C9 vs EP20K1500CF33C8ES तुलना
विस्तृत दोनों ओर की तुलना EP20K1500CF33C9 द्वारा Intel और EP20K1500CF33C8ES द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EP20K1500CF33C9 - APEX 20K 1.5M Gates FPGA | Intel (Altera) | 1020-FBGA
EP20K1500CF33C9 Obsolete
विशेषता तुलना
| पैरामीटर | EP20K1500CF33C9 | EP20K1500CF33C8ES |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | अंतिम बार खरीदें |
| Family | APEX 20K | — |
| Series | EP20K1500 | APEX 20K (APEX 20KE family) |
| Device Type | FPGA (SRAM-based, in-system programmable) | — |
| Approximate System Gates | 1,500,000 | — |
| Logic Elements (max, family) | 212,992 | — |
| Embedded Memory (ESB, max, family) | 432 Kbit | — |
| Package Code | HBGA / FineLine BGA | — |
| Pin / Ball Count | 1020 | — |
| Package Size | 33 x 33 mm | — |
| User I/O Count (family) | 808 | — |
| ऑपरेटिंग तापमान | 0C to +85C (Commercial, C grade) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -9 (fastest commercial) | -1 (C8) |
| Supply Voltage (core) | 1.8 V typical | — |
| Configuration Mode | SRAM / JTAG (in-system) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| RoHS स्थिति | Unknown (legacy family) | [DATA_NEEDED: RoHS compliance for ES variant] |
| लाइफसाइकिल स्थिति | Obsolete / Last-time-buy (per Intel PDN) | — |
| Manufacturer | — | Intel (formerly Altera) |
| System Gates | — | 1,500,000 |
| Maximum Gates (Equivalent) | — | 2,392,000 |
| Logic Elements | — | 51,840 |
| Embedded System Block (ESB) Bits | — | 442,368 |
| CAM Bits | — | 216 Kbit |
| Number of PLLs | — | 4 |
| Number of Clocks | — | 8 clock pins |
| Maximum User I/O | — | 808 (1020-FBGA) |
| पैकेज | — | 1020-FBGA (FCBGA), 33x33 mm |
| Voltage - Supply (Core) | — | 1.8 V nominal (multiVolt I/O supports 1.8/2.5/3.3/5.0 V) |
| I/O Standard Support | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS (multiVolt) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Programming Interface | — | ByteBlaster / MasterBlaster / Altera USB-Blaster |
| Sample Tier | — | ES (engineering sample) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |