EP20K30EFC324-1 vs EP20K30EFC324-3 तुलना
विस्तृत दोनों ओर की तुलना EP20K30EFC324-1 द्वारा Altera और EP20K30EFC324-3 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K30EFC324-1 | EP20K30EFC324-3 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Manufacturer | Altera (now Intel) | — |
| Series | APEX-20K | APEX-20KE |
| Family | APEX-20KE (1.8V, LVDS) | APEX 20KE (MultiCore architecture) |
| Logic Elements (typical) | 30,000 (30KLE) | — |
| Typical Gates | [DATA_NEEDED: typical gate count] | — |
| Total RAM Bits | 24576 | 24,576 |
| Maximum User I/O | 128 | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage | [DATA_NEEDED: VCCIO range] | — |
| पैकेज | 324-FBGA (FineLine BGA, 19x19 mm) | 324-FBGA (19 mm x 19 mm) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| पिन काउंट | 324 | — |
| Temperature Grade | Commercial (per Altera family specification) | — |
| ऑपरेटिंग तापमान | 0C to +85C (commercial grade per Altera family spec) | — |
| Process Technology | SRAM-based, 0.18 um | 1.8 V, 0.18 micrometer CMOS |
| Configuration | Passive serial / passive parallel / JTAG | — |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Speed Grade | -1 | -3 |
| MSL स्तर | [DATA_NEEDED: MSL moisture sensitivity level] | 3 |
| PLLs | Up to 4 (per APEX-20KE family) | — |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Typical Gate Count | — | 30,000 gates |
| Macrocells | — | 128 |
| Logic Elements (approx.) | — | 1,200 |
| User I/O | — | 120 |
| Operating Temperature (max) | — | 85 C |
| Peak Reflow Temperature | — | 220 C |
| LVDS I/O Support | — | Yes |
| Programming Interface | — | JTAG (in-system programmable) |
| RoHS स्थिति | — | unknown |