EP20K400GI655-3X vs EP20K400GI655-3V तुलना
विस्तृत दोनों ओर की तुलना EP20K400GI655-3X द्वारा Intel और EP20K400GI655-3V द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EP20K400GI655-3V - APEX 20K 400K-Gate FPGA, 16K LE, 655-Pin PGA | Altera (Intel)
EP20K400GI655-3V Obsoleteविशेषता तुलना
| पैरामीटर | EP20K400GI655-3X | EP20K400GI655-3V |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Unknown | Obsolete |
| Product Type | Field Programmable Gate Array | — |
| Device Family | APEX 20K | EP20K400 |
| Logic Elements/Cells | 16,640 | — |
| Technology | CMOS | CMOS (0.18 µm process) |
| Terminal Count | 655 | — |
| Package Type | SPGA | — |
| Package Designation | SPGA655 | — |
| Package Dimensions | 47 mm x 47 mm | — |
| Power Supply | 2.5 V | — |
| Power Supply Option | 2.5/3.3 V | — |
| माउंटिंग प्रकार | [DATA_NEEDED: mounting type] | Through-Hole (Pin Grid Array) |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature] | -40 °C to +85 °C (industrial) |
| I/O Count | [DATA_NEEDED: I/O count] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory capacity] | — |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| RoHS स्थिति | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Series | — | APEX 20K |
| Logic Elements | — | 16,640 |
| Typical Gate Count | — | 400,000 gates |
| Maximum User I/O | — | 496 |
| Dedicated Inputs | — | 6 |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Total Embedded RAM | — | [DATA_NEEDED: total RAM bits] |
| Maximum Internal Clock Frequency | — | 714.2 MHz |
| Supply Voltage VCCINT | — | 2.5 V |
| I/O Supply Voltage VCCIO | — | 2.5 V or 3.3 V |
| पैकेज | — | 655-pin SPGA (Staggered PGA), 47 x 47 mm |
| नमी संवेदनशीलता स्तर (MSL) | — | 1 |
| Qualification | — | Not Qualified |
| Configuration Interface | — | IEEE 1149.1 JTAG + serial / parallel passive |