EP20K60EFI144-2X vs EP20K60EFC144-1 तुलना
विस्तृत दोनों ओर की तुलना EP20K60EFI144-2X द्वारा Altera और EP20K60EFC144-1 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K60EFI144-2X | EP20K60EFC144-1 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | Obsolete |
| Device Family | APEX 20KE | APEX 20KE |
| Typical Gates | 60,000 | 60,000 |
| Logic Elements | 2,560 | — |
| Maximum Operating Frequency | 200 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V (range 1.71 V to 1.89 V) | — |
| Propagation Delay (tpd) | 2.41 ns | — |
| User I/O Pins | 93 | — |
| Dedicated Inputs | 4 | — |
| Total Terminals | 144 | — |
| Package Type | FBGA-144 (FineLine BGA, LBGA) | — |
| Package Code | LBGA | — |
| Terminal Form | Ball | — |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| I/O Standard Support | LVDS, 1.8 V I/O | — |
| Speed Grade | -2 (industrial, -2X suffix) | -1 |
| ऑपरेटिंग तापमान | -40 °C to +85 °C | 0 C to 85 C (Commercial) |
| Configuration Interface | JTAG (IEEE 1149.1) / serial PROM / parallel PROM | — |
| नमी संवेदनशीलता स्तर (MSL) | 3 | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs_status] |
| Series | — | APEX 20K |
| Logic Family | — | CMOS |
| Maximum System Gates | — | 256,000 |
| Macrocells | — | 256 |
| Maximum User I/Os | — | 93 (per datasheet; 196 max in 144-FBGA family datasheet) |
| Embedded Memory | — | 32,768 bits (2560 RAM blocks) |
| Maximum Internal Frequency | — | 160 MHz |
| Propagation Delay | — | 1.72 ns |
| Core Supply Voltage | — | 1.8 V |
| पैकेज | — | 144-FBGA (Fine-pitch BGA) |
| Package Pin Count | — | 144 balls |
| Programming Interface | — | JTAG / ByteBlaster / Altera Programming Unit |