EP2A15B724C vs EP2A15B724C9 तुलना
विस्तृत दोनों ओर की तुलना EP2A15B724C द्वारा Altera और EP2A15B724C9 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP2A15B724C | EP2A15B724C9 |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | NRND |
| Family | APEX II | APEX II (EP2A15) |
| Logic Elements (LEs) | 16,640 | — |
| Maximum User I/O Pins | 492 | — |
| Embedded RAM | 425,984 bits | — |
| पैकेज | 724-Ball FCBGA (FineLine BGA) | 724-ball FCBGA (Fine-pitch Chip-Scale BGA) |
| Process Technology | 0.18 micron CMOS | 0.15 µm all-layer copper (up to 8 metal layers) |
| Maximum System Gates | Up to 1.5M gates (family-level) | — |
| Embedded System Blocks (ESBs) | Configurable as dual-port RAM / ROM / FIFO | — |
| Interconnect | MultiTrack, deterministic | — |
| I/O Standards | LVTTL, LVCMOS, LVDS, PCI, GTL+ (family-level) | — |
| PLLs | Yes (family-level, up to 4 per device) | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature grade] | Commercial (0 °C to +85 °C) |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount |
| MSL स्तर | [DATA_NEEDED: MSL rating] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Speed Grade | C (per suffix; specific speed bin [DATA_NEEDED]) | — |
| JTAG / Configuration | IEEE 1149.1 JTAG; passive serial / PS configuration supported (family-level) | — |
| Series | — | APEX II |
| Logic Elements | — | 16640 |
| Number of Gates | — | 600000 |
| Embedded Memory (RAM bits) | — | 425984 |
| User I/O Count | — | 492 |
| Supply Voltage (Core) | — | 1.5 V |
| I/O Voltages Supported | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) |
| Maximum Internal Frequency | — | 500 MHz |
| LVDS Data Rate | — | Up to 1 Gbps (True-LVDS) |
| Interface Standards | — | LVDS, LVPECL, PCML, HyperTransport |
| Embedded Memory Type | — | ESB - dual-port RAM / ROM / FIFO / CAM |
| Clock Management | — | On-chip PLLs |