EP2A15F672C9N vs EP2A15F672C7AA तुलना
विस्तृत दोनों ओर की तुलना EP2A15F672C9N द्वारा Intel और EP2A15F672C7AA द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP2A15F672C9N | EP2A15F672C7AA |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | अंतिम बार खरीदें |
| Logic Family | APEX II (CMOS) | — |
| Series | Altera APEX II (EP2A) | — |
| Logic Elements / Cells | 16,640 | — |
| Equivalent Gates | 600,000 | — |
| Maximum User I/O Pins | 492 | — |
| Propagation Delay | 1.94 ns | — |
| Internal Operating Frequency (max) | 379 MHz | — |
| Technology Process | 0.15 µm all-layer copper CMOS, up to 8 metal layers | — |
| Core Supply Voltage | 1.5 V | — |
| पैकेज | 672-ball FC-FBGA (27 x 27 mm, 1 mm pitch, FineLine BGA) | 672-ball FC-FBGA (flip-chip) |
| ऑपरेटिंग तापमान | 0°C to +85°C (commercial grade) | — |
| माउंटिंग प्रकार | Surface Mount | — |
| MSL स्तर | 3 (per FC-FBGA moisture sensitivity, typical) | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | Compliant (per Full-Electronic listing) |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | — |
| I/O Speed Grade | Up to 1 Gbps (LVDS) | — |
| Embedded Memory | Embedded dual-port RAM blocks | Dual-port RAM blocks + CAM blocks |
| Special Blocks | CAM (Content-Addressable Memory), dedicated multipliers, PLLs | — |
| Speed Grade | C9 (fastest commercial grade in the APEX II speed-grade system) | — |
| Family | — | APEX II |
| Typical Gates | — | 600K |
| Maximum System Gates | — | 1.4M |
| Logic Elements (LEs) | — | 16,640 |
| Maximum User I/O | — | 492 |
| Operating Frequency (internal) | — | 500 MHz |
| LVDS Data Rate | — | 1 Gbps True-LVDS |
| Core Voltage | — | 1.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, PCI-X, SSTL, HSTL, LVDS, LVPECL, PCML, HyperTransport |
| MultiVolt I/O Bank Voltages | — | 1.5V / 1.8V / 2.5V / 3.3V |
| PLLs | — | 4 enhanced PLLs |
| Process Technology | — | 0.15 micrometer all-layer copper (up to 8 metal layers) |
| Programming Interfaces | — | Passive Serial, Fast Passive Parallel, JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lifecycle | — | Last-Time-Buy / EOL announced Nov-Dec 2016 |