EP2A40B724C8 vs EP2A40B724C8ES तुलना
विस्तृत दोनों ओर की तुलना EP2A40B724C8 द्वारा Intel और EP2A40B724C8ES द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP2A40B724C8 | EP2A40B724C8ES |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | अंतिम बार खरीदें | Obsolete |
| Family | APEX II | Field Programmable Gate Array (FPGA) |
| Device Logic Elements / Cells | 38400 | — |
| Total System Gates | ~1.5 M | — |
| Total RAM Bits | 655360 | — |
| Number of I/O | 540 | 540 |
| Number of Logic Gates | [DATA_NEEDED: exact gate count in cells vs system gates] | — |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| Maximum Internal Frequency | 376 MHz | — |
| Process Technology | 0.15 µm CMOS, all-layer copper, up to 8 metal layers | — |
| I/O Standards Supported | True-LVDS, LVPECL, PCML, HyperTransport (up to 1 Gbps) | — |
| पैकेज / केस | 724-BBGA, FCBGA (35 x 35 mm) | — |
| Supplier Device Package | 724-BGA | — |
| ऑपरेटिंग तापमान | 0 °C to 85 °C (TJ) | [DATA_NEEDED: operating temperature range] |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Shipping Media | Tray | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status per datasheet] | [DATA_NEEDED: RoHS status] |
| नमी संवेदनशीलता स्तर (MSL) | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| Series | — | APEX II (EP2A) |
| Logic Elements / Cells | — | 38,400 |
| Number of Gates (typical) | — | 655,360 |
| पैकेज | — | 724-BBGA / FCBGA |
| Speed Grade | — | -8 (C8) |
| MSL स्तर | — | [DATA_NEEDED: MSL moisture sensitivity level] |
| सप्लाई वोल्टेज | — | [DATA_NEEDED: VCCINT / VCCIO core and I/O voltages] |
| Process Node | — | [DATA_NEEDED: CMOS process technology] |
| Embedded Memory | — | Embedded System Blocks (ESB) |
| Programmable Logic Type | — | SRAM-based, in-system reconfigurable |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Architecture | — | MultiCore interconnect with LABs and ESBs |