EP2A70B724C7N vs EP2A70B724C9 तुलना
विस्तृत दोनों ओर की तुलना EP2A70B724C7N द्वारा Altera और EP2A70B724C9 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP2A70B724C7N | EP2A70B724C9 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | APEX II (EP2A70) | APEX II |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Technology | 0.15 µm CMOS | — |
| System Gates | 3,000,000 | — |
| Logic Cells / Logic Elements | 67,200 | — |
| Maximum Internal Frequency | 420 MHz | — |
| Propagation Delay (typ.) | 2.17 ns | — |
| User I/O Pins | 536 | — |
| Macrocells (memory blocks reference) | 16 | — |
| Core Supply Voltage | 1.5 V nominal | — |
| I/O Supply Voltage | MultiVolt (1.5V / 1.8V / 2.5V / 3.3V / 5V tolerant) | — |
| ऑपरेटिंग तापमान | 0 °C to +85 °C (Commercial) | 0C to +85C (commercial) |
| पैकेज | 724-pin FCBGA (Flip-Chip BGA) | 724-BBGA, FCBGA (FineLine BGA) |
| Ball Pitch | 1.27 mm | — |
| Seated Height | 3.5 mm | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount (BGA) |
| Configuration Method | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | Embedded System Blocks (ESBs) - dual-port RAM / ROM / CAM | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | Non-compliant (per IC-Components listing) |
| Logic Elements | — | 67200 |
| Embedded Memory (bits) | — | 1146880 |
| User I/O Count | — | 540 |
| Process Technology | — | 0.15 um all-layer copper (up to 8 metal layers) |
| LVDS Channels | — | Up to 8 LVDS pairs at 1 Gbps |
| I/O Standards Supported | — | True-LVDS, LVPECL, PCML, HyperTransport |
| Embedded Memory Type | — | ESB (synchronous, self-timed WE, true dual-port / simple dual-port / single-port) |
| PLLs | — | Up to 4 |
| Speed Grade | — | C9 (commercial, speed bin 9) |
| Supply Voltage (core) | — | 1.5 V |
| MSL स्तर | — | [DATA_NEEDED: MSL level] |