EP2SGX90EF35C3NES vs EP2SGX130GF40C3NES तुलना
विस्तृत दोनों ओर की तुलना EP2SGX90EF35C3NES द्वारा Intel और EP2SGX130GF40C3NES द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Altera
EP2SGX130GF40C3NES - Stratix II GX FPGA, 132K LE, 6.375Gbps | Altera
EP2SGX130GF40C3NES Obsoleteविशेषता तुलना
| पैरामीटर | EP2SGX90EF35C3NES | EP2SGX130GF40C3NES |
|---|---|---|
| ब्रांड | Intel | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 90,000 | 132540 |
| Number of Terminals | 35 | — |
| Package Type | BGA | — |
| Package Shape | Square | — |
| Form of Terminal | Ball | — |
| Core Supply Voltage | 1.2 V | — |
| Operating Temperature Grade | Commercial Extended | Commercial Extended |
| Transceiver Data Rate (max) | 6.375 Gbps | — |
| Transceiver Channels | 4 to 20 | 4 to 20 (per device family configuration) |
| Process Node | 90 nm | — |
| Logic Element | ALM (Adaptive Logic Module) | — |
| Configuration Interface | JTAG / Passive Serial / Active Serial | — |
| Embedded Memory Type | TriMatrix | — |
| RoHS स्थिति | [DATA_NEEDED: rohs] | Lead-free compliant (per package code MS-034AAU-1) |
| Lead Free | [DATA_NEEDED: lead_free] | — |
| Logic Array Blocks (LABs) | — | 7047 |
| Maximum Internal Frequency | — | 778.82 MHz |
| Process Technology | — | 90 nm CMOS |
| Core Voltage | — | 1.2 V |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Transceiver Feature | — | Embedded SERDES with Clock/Data Recovery (CRU) |
| मेमोरी प्रकार | — | TriMatrix embedded memory (distributed RAM, block RAM, shift register) |
| पैकेज | — | 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) |
| Terminal Form | — | Ball (BGA) |
| माउंटिंग प्रकार | — | Surface Mount |
| Series | — | EP2SGX130 |