EP910PC30T vs EP910PC-35 तुलना
विस्तृत दोनों ओर की तुलना EP910PC30T द्वारा Altera और EP910PC-35 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP910PC30T | EP910PC-35 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Classic EPLD |
| Device Series | EP910 | — |
| Number of Macrocells | 24 | — |
| Number of I/O Pins | 24 | — |
| Number of Dedicated Inputs | 12 | — |
| Maximum Product Terms | 240 | — |
| Propagation Delay (tPD) | 30 ns | 35 ns |
| Maximum Clock Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Process Technology | CMOS | — |
| Programmable Logic Architecture | PAL-type sum-of-products, EPLD | — |
| पैकेज | 24-pin PDIP (PC) | 40-pin PDIP (Plastic DIP) |
| माउंटिंग प्रकार | Through-Hole (THT) | Through-Hole |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -30 (30 ns tPD) | — |
| Programming Technology | EPROM (OTP in plastic package, UV-erasable in windowed package) | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | — |
| पिन काउंट | 24 | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 24 |
| I/O Pins | — | 24 |
| Dedicated Inputs | — | 12 |
| Total Inputs | — | 36 |
| Product Terms | — | 240 |
| Maximum Counter Frequency | — | 37 MHz |
| Internal Performance Frequency | — | 100 MHz |
| Technology | — | CMOS, UV-erasable/OTP |
| सप्लाई वोल्टेज | — | 5 V |
| Architecture | — | PAL-type sum-of-products, AND/OR array |
| Programming Method | — | UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools |
| Compliance / RoHS | — | [DATA_NEEDED: RoHS status - legacy part] |