EPF10K200SRC240-2 vs EPF10K200SRC240-1 तुलना
विस्तृत दोनों ओर की तुलना EPF10K200SRC240-2 द्वारा Intel और EPF10K200SRC240-1 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPF10K200SRC240-2 | EPF10K200SRC240-1 |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | NRND |
| Series | FLEX 10KS | FLEX-10KS |
| Family | FLEX 10KS (FLEX 10KE/10KA generation) | FLEX 10K Embedded Programmable Logic |
| Number of Logic Elements (LEs) | 9984 | — |
| Number of Logic Array Blocks (LABs) | 1248 | — |
| Total RAM Bits | 98304 | — |
| Number of User I/Os | 182 | — |
| Number of Gates | 513000 | — |
| Core Supply Voltage | 2.375 V to 2.625 V (nominal 2.5 V) | — |
| ऑपरेटिंग तापमान | 0C to +70C (Commercial, TA) | -40C to +85C (industrial) |
| पैकेज / केस | 240-BFQFP Exposed Pad (240-RQFP, 32x32 mm) | 240-BFQFP Exposed Pad (RQFP-240) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Terminal Form | GULL WING | — |
| Number of Terminals | 240 | — |
| Speed Grade | -2 (~80 MHz internal, typical) | -1 (fastest) |
| Configuration Interface | IEEE 1149.1 JTAG + Altera EPC EEPROM | — |
| Process Technology | 0.42 micrometer CMOS SRAM | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs status] |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA - Field Programmable Gate Array |
| Number of Logic Elements | — | 9984 |
| Number of LABs (Logic Array Blocks) | — | 1248 |
| Number of EABs (Embedded Array Blocks) | — | 24 |
| Total EAB RAM Bits | — | 40960 |
| Total SRAM Bits | — | 98304 |
| Typical System Gates | — | 200000 |
| Maximum System Gates | — | 513000 |
| Number of I/O Pins | — | 182 |
| Supply Voltage - Core | — | 5.0 V |
| Supply Voltage - I/O | — | 3.3 V / 5.0 V (multiVolt) |
| Supplier Device Package | — | 240-RQFP (32x32 mm) |
| Programmability | — | SRAM-based, in-system via JTAG |
| JTAG (IEEE 1149.1) | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |