EPM5064LC-1 vs EPM5064LC तुलना
विस्तृत दोनों ओर की तुलना EPM5064LC-1 द्वारा Altera और EPM5064LC द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5064LC-1 | EPM5064LC |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1.25K (approx.) | 1.25K |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 4.75 V to 5.25 V |
| Internal Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tPD) | 40 ns | 55 ns |
| Input Lines | 36 | — |
| Dedicated Inputs | 7 | — |
| Output Lines | 28 | — |
| Programming Technology | OTP / UV-Erasable EPROM | — |
| पैकेज | 44-pin PLCC (Plastic Leaded Chip Carrier) | PLCC-44 (LCC-44, J-lead) |
| Process Technology | CMOS | CMOS EPROM |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant] |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programming Type | — | OTP (One-Time-Programmable, UV-erasable EPROM) |
| Macro Cells | — | 64 |
| Total Inputs | — | 36 (7 dedicated + 29 I/O) |
| I/O Pins | — | 28 bidirectional + 4 dedicated input |
| माउंटिंग प्रकार | — | Surface Mount |
| Lead Free | — | [DATA_NEEDED: lead-free status] |