M1AFS1500-FG256I vs M1AFS1500-2FG256I तुलना
विस्तृत दोनों ओर की तुलना M1AFS1500-FG256I द्वारा Microchip Technology और M1AFS1500-2FG256I द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
M1AFS1500-FG256I - Fusion Mixed-Signal FPGA, 1.5M Gates | Microchip
M1AFS1500-FG256I ✓ सक्रियMicrochip Technology
M1AFS1500-2FG256I - 1.5M Gate Fusion FPGA with Cortex-M1 | Microchip
M1AFS1500-2FG256I ✓ सक्रियविशेषता तुलना
| पैरामीटर | M1AFS1500-FG256I | M1AFS1500-2FG256I |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | Fusion Mixed-Signal FPGA (M1 series) | Fusion (Mixed-Signal Flash FPGA) |
| System Gates | 1500000 gates | 1500000 |
| User I/O | 119 | — |
| Flash Memory | 276480 bits | — |
| Logic Technology | 130 nm flash-based CMOS, 7-layer metal | — |
| System Performance | 350 MHz | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| पैकेज | 256-LBGA (FG256) | 256-ball FBGA (LBGA) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Processor Support | ARM Cortex-M1 soft core | — |
| Security | 128-bit flash lock with AES decryption | — |
| Configuration | Nonvolatile flash, Live at Power-Up (LAPU) | — |
| Temperature Grade | I (Industrial), -40C to +85C | — |
| Analog Features | Configurable analog blocks (mixed-signal) | — |
| Clock Management | On-chip clock generation and management circuitry | Integrated clock generation and management circuitry |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | Compliant |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Logic Cells | — | 38400 |
| Embedded Processor | — | ARM Cortex-M1 (M1 variant) |
| Speed Grade | — | -2 |
| Process Technology | — | 130 nm Flash-based CMOS |
| Configuration Memory | — | On-chip Flash (non-volatile, secure) |
| ऑपरेटिंग तापमान | — | -40C to +100C (Industrial) |
| Lead Free | — | Yes |
| Analog Subsystem | — | Mixed-signal FPGA with configurable analog blocks and ADC |
| Packaging | — | Tray |