RTAX250SL-1CG624E vs RTAX250SL-LG624E तुलना
विस्तृत दोनों ओर की तुलना RTAX250SL-1CG624E द्वारा Microchip Technology और RTAX250SL-LG624E द्वारा Microsemi. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX250SL-1CG624E - 250K Gate Rad-Tolerant FPGA, CCGA-624 | Microchip
RTAX250SL-1CG624E ✓ सक्रियMicrosemi
RTAX250SL-LG624E - 250K Gate Rad-Tolerant FPGA | Actel/Microchip
RTAX250SL-LG624E ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX250SL-1CG624E | RTAX250SL-LG624E |
|---|---|---|
| ब्रांड | Microchip Technology | Microsemi |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Equivalent System Gates | 250,000 gates | 250000 gates |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| Logic Cells | 4224 | — |
| User I/O | 248 inputs / 248 outputs | — |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | 1.5 V |
| Maximum Combinatorial Delay (CLB) | 0.93 ns | — |
| Maximum System Frequency | 649 MHz | 649 MHz |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Logic Family | CMOS | — |
| पैकेज | 624-ball Ceramic Column Grid Array (CCGA-624) | 624-Pin LGA (LG624) |
| ऑपरेटिंग तापमान | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Radiation Tolerance | SEU-immune to specified LET threshold; SEU rate < 10-10 errors/bit-day | Radiation-tolerant, space-flight qualified family |
| SEU Mitigation | SEU-hardened registers (no external TMR required) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Configuration | Live-at-power-up, true single-chip operation | — |
| माउंटिंग प्रकार | Surface Mount (ceramic column grid array) | Surface Mount |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| I/O Supply Voltage | [DATA_NEEDED: I/O bank voltage] | — |
| Manufacturer | — | Actel (Microsemi / Microchip Technology) |
| Family | — | RTAX-SL Radiation-Tolerant FPGA |
| Logic Cells (CLBs) | — | 2816 cells |
| Live at Power-Up | — | Yes |
| Clock Architecture | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| Speed Grade | — | Standard (-) per RTAX-S/SL speed grade system |
| I/O Count (LG624) | — | [DATA_NEEDED: user I/O count for LG624 package] |