RTAX250SL-LG624E vs RTAX250S-CG624E तुलना
विस्तृत दोनों ओर की तुलना RTAX250SL-LG624E द्वारा Microsemi और RTAX250S-CG624E द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microsemi
RTAX250SL-LG624E - 250K Gate Rad-Tolerant FPGA | Actel/Microchip
RTAX250SL-LG624E ✓ सक्रियMicrochip Technology
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624E ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX250SL-LG624E | RTAX250S-CG624E |
|---|---|---|
| ब्रांड | Microsemi | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Manufacturer | Actel (Microsemi / Microchip Technology) | — |
| Family | RTAX-SL Radiation-Tolerant FPGA | RTAX-S radiation-tolerant FPGA |
| Equivalent System Gates | 250000 gates | — |
| Logic Cells (CLBs) | 2816 cells | 2816 |
| Maximum System Frequency | 649 MHz | — |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| पैकेज | 624-Pin LGA (LG624) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Radiation Tolerance | Radiation-tolerant, space-flight qualified family | — |
| Live at Power-Up | Yes | — |
| Clock Architecture | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Dedicated carry logic | — |
| Speed Grade | Standard (-) per RTAX-S/SL speed grade system | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| I/O Count (LG624) | [DATA_NEEDED: user I/O count for LG624 package] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance] | — |
| System Gates | — | 250000 gates |
| Maximum Toggle Frequency | — | 649 MHz |
| Logic Family | — | CMOS |
| CLB Combinatorial Delay (max) | — | 0.930 ns |
| Package Type | — | CCGA-624 (ceramic column grid array, 624 pins) |
| Programming Technology | — | Antifuse (one-time programmable) |
| SEU Hardening | — | SEU-hardened registers, no external TMR required |
| SEU Immunity | — | Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day |
| Power-Up Behavior | — | Live at power-up (true single-chip) |
| Target Application | — | Space-flight systems |