आज क्या बदल गया, यह आपके BOM के लिए क्यों महत्वपूर्ण है और क्या देखना चाहिए। हर तथ्य-दावा को स्रोत तक नक़ल किया जाता है; हमारी स्वयं की विश्लेषण चिह्नित की जाती है और अलग रखी जाती है。
EN · एकल भाषा संपादकीय नीति
Mistral releases Le Chonk, a 1-trillion-parameter MoE open-weights LLM trained on ~3,800 Grace Blackwell GPUs in Europe. Weights drop on Hugging Face this month; cybersecurity is the standout pitch.
Anthropic ships a first-party Google Workspace add-on that lets Claude read and edit Docs, Sheets and Slides in-place, putting Anthropic in direct competition with Gemini and Copilot on enterprise productivity surfaces.
Cohere ships North 2 with memory, quotas, admin analytics and a model-swappable harness. Source omits pricing and memory-retention figures.
AI demand is no longer gated by GPU supply. Power, HBM, CoWoS-L, GaN and CPO are the new constraints designers and buyers must plan around.
Renesas TP65H020G4PLSGBD 650 V GaN FET, Vishay 650 V Superjunction modules, Diodes SBRFP rectifiers, Infineon-Eaton SiC SST work, a Navitas 10 kV SiC IGBT program slot and an ITEN 1,500 µAh SMD cell all landed in one week.
Renesas EOLs H8 microcontrollers embedded in 200M devices; 1200V SiC lead times push to Q3 2027; HBM3E locked up while commodity DRAM and NAND stay flat.
Microchip and Navitas combine GaN power stages and a dsPIC33AK DSC into a single 800V-to-6V reference design for AI racks, targeting Nvidia's Kyber ecosystem.
Musk confirmed Intel's 14A process remains the manufacturing plan for Terafab, while TSMC would only potentially sublease part of the site.
A lead hyperscaler has placed about $6M in follow-on orders for Aehr's Sonoma package-level burn-in systems, targeting a second next-gen AI processor ramping in calendar 2027.
Skyworks has AEC-Q100 qualified its Si829x isolated gate driver and released samples. The device targets ASIL D traction inverters with up to 15 A variable-current drive for SiC FETs and IGBTs.
KLA-via-Semiconductor-Engineering explains how 2D, IR, and 3D metrology combine to catch surface, sidewall, and sub-surface defects in hybrid-bonded packages.
Astera Labs adds retimers, redrivers, cable modules, optical drivers and TAs to its Aries 7 portfolio, with sampling due in Q4 2026 ahead of OCP Global Summit demos.
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