ADC/DAC
Produk (3.100+)
ISL26104AVZ - 24-Bit 4kSPS 4-Ch Sigma-Delta ADC | Renesas
The Renesas ISL26104AVZ is a 24-bit low-noise delta-sigma analog-to-digital converter with four differential multiplexed input channels, an integrated low-noise programmable-gain amplifier (PGA), and an output data rate up to 4 kSPS, housed in a 28-pin TSSOP package. Its headline parameters are 24-bit resolution, 4 fully differential input channels, and a programmable output word rate from 2.5 SPS to 4 kSPS, all integrated in a single analog front-end IC. A delta-sigma (sigma-delta) ADC is a type of oversampling converter that uses a high-frequency modulator and digital decimation filtering to achieve very high resolution at the cost of absolute input bandwidth. In the broader taxonomy, the ISL26104 belongs to the precision ADC product family, which sits within data converters, a sub-category of mixed-signal integrated circuits. Delta-sigma ADCs are widely used in industrial weighing, process control, temperature measurement, and strain-gauge instrumentation because they trade conversion speed for excellent noise performance and integral linearity. Key features of the ISL26104AVZ include the on-chip low-noise PGA with gains from 1x to 128x, which allows direct connection of low-amplitude signals such as load cells, thermocouples, and bridge sensors without an external instrumentation amplifier. The device supports an external differential reference and offers a serial SPI-compatible output interface. Its integrated digital filter delivers 50 Hz and 60 Hz mains-rejection at appropriate output data rates, simplifying design for industrial environments with significant line-frequency noise. The device operates from a single analog supply (typically +5 V) and a digital supply, with an internal clock. The 28-pin TSSOP package provides a small footprint while still allowing hand-soldering for prototypes and small production runs. According to the Renesas datasheet, the ISL26104 also shares pin-out compatibility with the 2-channel ISL26102, giving designers a simple upgrade path when more channels are required. Typical applications include industrial weighing scales, load-cell signal conditioning, multi-channel temperature acquisition, pressure transducers, and precision weigh-in-motion modules. The combination of an integrated PGA and high-resolution conversion removes most of the analog signal-chain complexity for sensor readout. Designers should note that the PGA gain, output data rate, and digital-filter bandwidth trade off against each other: higher PGA gain reduces input-referred noise but narrows the usable bandwidth, while lower output data rates improve noise-free resolution at the expense of conversion speed.
ISL26104AVZ-T7A - 24-bit 4kSPS 4-Ch Sigma-Delta ADC | Renesas
The Renesas ISL26104AVZ-T7A is a 24-bit low-noise 4-channel delta-sigma analog-to-digital converter with on-chip programmable-gain amplifier and 4 kSPS maximum output data rate, housed in a 28-pin TSSOP package. It accepts four differential multiplexed inputs and operates from an analog supply of 4.75 V to 5.25 V and a digital supply of 2.7 V to 5.25 V. The serial interface provides SPI/QSPI/MICROWIRE-compatible read/write access to on-chip registers for channel selection, gain (1x-128x), and output data rate (2.5 SPS to 4 kSPS). A delta-sigma ADC is a type of oversampling converter that trades speed for resolution: an internal modulator shapes quantization noise away from the band of interest, and a digital decimation filter removes that noise to extract a high-resolution 24-bit code. The ISL26104's exceptionally low input-referred noise (about 10 nV/√Hz PGA equivalent, per the Renesas datasheet) places it firmly in the precision instrumentation category used in weigh scales, bridge transducers, and thermocouple acquisition. Key features include 24-bit noise-free resolution at lower data rates, a PGA with gains of 1, 2, 4, 8, 16, 32, 64, and 128, a single-cycle settling digital filter, an integrated low-drift reference input, and a low quiescent current ideal for loop-powered or battery instruments. The four differential input channels are sequentially scanned via the MUX register, simplifying multi-sensor front ends by removing external analog switches. Typical applications include industrial load-cell weigh scales, RTD and thermocouple temperature acquisition, pressure-sensor signal conditioning, multi-zone gas detection front ends, and precision laboratory instrumentation where 4 kSPS covers typical slow-control loops without sacrificing effective resolution. When designing with this part, place 0.1 uF decoupling capacitors within 5 mm of AVDD and DVDD, keep the analog and digital grounds separated and joined only at the exposed pad, and choose an RGEF/A external reference or pair of input resistors to set the common-mode for thermocouple measurement. This page synthesizes distributor stock and pricing as of 2026-10-13, drop-in TSSOP-28 alternatives from the same and cross-brand product families, and practical design notes not found in the manufacturer datasheet.
ISL26134AVZ-T7A - 24-bit Low-Noise Delta-Sigma ADC | Renesas
The Renesas ISL26134AVZ-T7A is a 24-bit, low-noise, 4-input, 1-channel sigma-delta analog-to-digital converter housed in a 28-pin TSSOP surface-mount package. It integrates a very low-noise programmable-gain amplifier (PGA) front end with up to 128x gain, an internal 2.5V reference, and on-chip calibration registers, all on a single mixed-signal IC designed for high-resolution measurement. A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and noise shaping to achieve very high resolution at the expense of input bandwidth. The ISL26134 sits at the top of the ADC hierarchy (delta-sigma -> ADC -> data converter -> data acquisition IC -> signal chain), enabling 24-bit effective resolution for DC and low-frequency measurements such as load-cell, strain-gauge, and temperature bridge readouts. Key features include 4 differential or 7 single-ended input channels selectable through a digital multiplexer, a true 24-bit no-missing-codes output, integrated PGA gain from 1x to 128x, an auxiliary 24-bit DAC for sensor excitation, and a simple SPI-compatible serial interface. RMS noise below 8 nV at low sample rates and a calibrated integral nonlinearity of better than 0.0015% of full scale make it suitable for precision weighing scales and laboratory instrumentation. The architecture combines a chopper-stabilized front end, a third-order modulator, and a digital SINC1/SINC3 FIR decimation filter. The chopper stage removes 1/f flicker noise; the modulator pushes quantization noise well above the baseband where the SINC filter removes it. Internal gain and offset calibration registers compensate for drift over temperature. Typical applications include industrial weigh scales, temperature/pressure bridge transmitters, multichannel data loggers, and 6-digit digital multimeter front ends. The wide PGA range lets the same IC read directly from low-output sensors such as load cells without external instrumentation amplifiers. Designers should keep analog and digital ground planes separated and place the bypass capacitors within 3 mm of the supply pins to avoid digital switching noise coupling into the modulator. For maximum SNR, choose the lowest output data rate that still meets the application bandwidth, since each halving of data rate reduces input-referred noise by approximately 30%.
ISL26310FBZ - 12-bit 125kSPS SAR ADC | Renesas
The Renesas ISL26310FBZ is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter with single-ended and differential inputs, housed in an 8-pin SOIC (NB) package. It features low power consumption, single +5V analog supply operation, and an SPI/QSPI/MICROWIRE-compatible serial interface, making it a fit for embedded industrial and instrumentation digitizer front ends. A SAR ADC is a successive-approximation-register analog-to-digital converter. It uses a binary search algorithm and an internal precision DAC to compare the sampled input against a reference voltage, producing a digital code in N conversion cycles for an N-bit result. SAR ADCs excel at low-latency, single-shot conversions with no pipeline delay, occupy a small footprint, and draw no idle current between conversions - ideal for multiplexed channel scanning, low-duty-cycle battery-powered sensing, and microcontroller-interfaced data acquisition where simplicity and deterministic latency matter more than maximum throughput. Key specifications of the ISL26310FBZ include 12-bit resolution, 125 kSPS maximum sampling rate, single +5V analog supply with +3.3V/+5V digital supply, single-ended and true-differential input pair operation, integrated track/hold, and a low-power serial interface that supports SPI, QSPI, and MICROWIRE protocols. The device includes a hardware shutdown pin to reduce current draw between conversions. The ISL26310FBZ is part of the ISL26310/11/12/13/14/15/19 pin-compatible family that scales channel count, input configuration (single vs. differential), and resolution up to 14-bit. This lets designers migrate between channel counts without PCB redesign. The internal SAR core uses a charge-redistribution DAC array with auto-calibrated capacitor matching to deliver linearity performance consistent across the full industrial temperature range. Typical applications include industrial process control loop monitoring, portable battery-powered instrumentation, multichannel data acquisition front ends, isolated sensor signal conditioning, and remote telemetry / SCADA modules. The 125 kSPS rate supports per-channel rates up to 10 kSPS in multiplexed multi-channel systems, sufficient for vibration, strain, and temperature acquisition. When using this device, decouple AVDD and DVDD separately close to the pins with 10uF bulk plus 0.1uF ceramic bypass, and add a 0.1uF cap on REF+ to ground. The shutdown pin (SHDN) can be tied to logic high for always-on operation; drive low between conversions to minimize system power. This page synthesizes current distributor pricing, drop-in pin-compatible alternatives from the ISL2631x family, and practical design notes not collated in the manufacturer datasheet.
ISL26310FBZ-T - 12-bit 125kSPS SAR ADC Single-Channel | Renesas
The Renesas ISL26310FBZ-T is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter with a single differential input channel, supplied in an 8-pin SOIC package and qualified for industrial temperature operation. It accepts single-ended or differential analog inputs, communicates over an SPI/serial interface, and operates from a 2.7 V to 5.5 V analog supply with low power dissipation suitable for battery-powered and always-on measurement systems. A SAR ADC is a type of analog-to-digital converter that performs a binary search through an internal capacitive DAC to digitize an analog input, completing a conversion in a fixed number of clock cycles. Within the data-acquisition hierarchy, the ISL26310FBZ-T sits between general-purpose 8-/10-bit ADCs and higher-resolution 14-/16-/24-bit delta-sigma converters, offering a balanced trade-off of speed, resolution, and power. Renesas's proprietary input multiplexer and input buffer amplifier reduce external drive requirements, simplifying front-end design. Key features include 12-bit resolution with no missing codes, a 125 kSPS maximum sampling rate, an internal 2.5 V reference, and integrated input buffer that reduces kickback and drive demands. The single-channel differential input accepts bipolar input ranges when properly biased, and the SPI-compatible serial interface supports daisy-chaining of multiple converters to minimize MCU pin count. Architecture highlights include a low-noise charge-redistribution SAR core, an automatic input multiplexer, and an on-chip oscillator. The 8-pin SOIC package has a thermal resistance of approximately 110 C/W and a small footprint (3.90 mm body width), enabling compact PCB layouts for portable instruments and process-control modules. Typical applications include portable instrumentation, process-control analog input modules, battery-powered sensor conditioning loops, and industrial data-acquisition front ends. The wide 2.7 V to 5.5 V supply range and low power consumption make the part well suited to distributed I/O nodes where heat and energy budget matter. When designing with this device, add anti-alias filtering on the analog input prior to the ADC and ensure the SPI SCLK stays within the converter's rated timing budget. Decoupling the AVDD pin with 100 nF and 10 uF capacitors placed close to the package pins is recommended to keep digital switching noise out of the conversion result. This page synthesizes verified distributor pricing, drop-in same-brand and cross-brand alternatives, and practical design notes that go beyond the datasheet's typical-application drawings, giving engineers a single reference for sourcing and second-sourcing decisions.
ISL26310FBZ-T7A - 12-bit 125kSPS SAR ADC, 1-Ch, 8-SOIC | Renesas
The Renesas ISL26310FBZ-T7A is a 12-bit resolution successive-approximation-register (SAR) analog-to-digital converter that samples at 125 kSPS in an 8-pin SOIC package. The single-channel device supports single-ended inputs with bipolar analog input ranges up to ±10 V (or 0 V to 12 V unipolar) when paired with ±5 V or +5 V external supplies. Its SPI-/QSPI-/MICROWIRE-compatible serial interface simplifies connection to microcontrollers, DSPs, and FPGAs in data-acquisition designs. The ISL26310FBZ-T7A is a member of the ISL2631x SAR ADC family which includes 1/2/4/8-channel single-ended and 1/2/4-channel differential input options. An SAR ADC is a sampling converter that uses a binary-searched capacitor DAC against the input voltage, producing an inherently low-latency digital conversion. It belongs to the broader signal-chain family: ADC -> data converter -> analog front-end -> data acquisition IC -> signal-chain component -> semiconductor. The bipolar-CMOS process gives the part low power consumption while preserving high DC accuracy and excellent linearity over temperature. Key features include 12-bit no-missing-codes performance, ±1 LSB INL/DNL typical, a low 5 mW power dissipation at 125 kSPS with 5 V supplies, and hardware/software shutdown that drops quiescent current to a few hundred nanoamperes. An internal input multiplexer (on multi-channel variants) plus a combination buffer amplifier reduces the need for external signal-conditioning, lowering the analog front-end bill of materials in instrumentation and process-control boards. Typical applications are industrial process control loops, multi-channel PLC analog input modules, portable/battery-powered instrumentation, and data-acquisition (DAQ) front ends that require ±10 V input ranges, ±5 V dual supplies, and a small serial-only footprint. Two of those industries, factory automation and mobile instrumentation, depend heavily on the part's robustness over temperature. When designing with this device, choose an external reference and op-amp front end sized to the source impedance to keep conversion error below 1 LSB at the full 125 kSPS data rate.
ISL26311FBZ - 12-bit 125kSPS SAR ADC | Renesas Electronics
The Renesas Electronics (formerly Intersil) ISL26311FBZ is a 12-bit, 125 kSPS successive-approximation (SAR) analog-to-digital converter in an 8-pin SOIC package with one differential/single-ended input channel. It delivers low power consumption, supports single-ended and differential input modes, and integrates multiple input channels for flexible signal-chain design in industrial, instrumentation, and process-control applications. An SAR (Successive Approximation Register) ADC is a type of analog-to-digital converter that uses a binary search algorithm with an internal DAC and comparator to digitize an analog input one bit at a time per clock cycle. SAR ADCs sit in the broader hierarchy of ADC architectures (SAR -> Nyquist-rate ADC -> data converter -> mixed-signal IC -> semiconductor) and are favored for medium-resolution, medium-speed acquisitions where low latency, deterministic sampling, and excellent DC accuracy are required. Key features include 12-bit resolution, 125 kSPS maximum sampling rate, single-channel input with single-ended or differential operation, an internal reference, and a SPI/QSPI/MICROWIRE-compatible serial interface. The wide analog input range and integrated input multiplexer simplify front-end signal conditioning, while the small 8-pin SOIC footprint supports compact PCB layouts in space-constrained designs. The device uses a low-noise charge-redistribution SAR architecture with an input track-and-hold, achieving ±1 LSB INL and low aperture jitter. The robust digital interface simplifies host-MCU integration, and the part operates from a single analog supply, reducing external component count. Its low power consumption makes it suitable for battery-powered data-acquisition systems. Typical applications include industrial process control loop monitoring, portable instrumentation and data loggers, multi-channel sensor signal acquisition, medical patient-monitoring front ends, and precision measurement equipment. The single-supply operation simplifies isolated sensor interface designs where low power and small package size are critical. When designing with this ADC, ensure the analog input does not exceed the supply rails and use the recommended bypass capacitors on AVDD and DVDD. The internal reference may be bypassed with an external capacitor for low-noise operation; verify timing against the SAR acquisition window in your specific signal-chain design. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, providing engineers a single reference for sourcing and substituting the ISL26311FBZ.
ISL26311FBZ-T7A - 12-bit 125kSPS SAR ADC, 1-Ch Diff | Renesas
The Renesas ISL26311FBZ-T7A is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter with a single differential input channel, housed in an 8-pin SOIC-N package and supplied on a 7-inch tape and reel. According to the manufacturer datasheet, the device operates from a single 2.7 V to 5.25 V analog supply and provides a high-speed SPI-/serial-compatible digital interface, integrating the sample-and-hold, reference input, and conversion clock on-chip to minimize external BOM. A SAR ADC is a type of data converter that uses a binary-search successive-approximation algorithm to digitize an analog input, trading resolution for speed. SAR converters sit within the broader ADC family (alongside delta-sigma, pipeline, and flash ADCs) and are widely preferred in multiplexed data-acquisition systems, industrial control loops, and portable instrumentation where deterministic latency, low power, and small package size are required. The ISL26311 belongs to the ISL26310/11/12/13/14/15/19 pin-compatible SAR ADC family from Renesas, which lets designers reuse one PCB footprint across multiple channel-count variants. Key features of the ISL26311FBZ-T7A include 12-bit resolution (no missing codes), true differential analog inputs for high common-mode rejection, integrated low-drift reference buffer support, and a 1-/8-pin SOIC footprint that simplifies layout in space-constrained designs. The low-power architecture targets 125 kSPS throughput at sub-mW conversion rates while preserving excellent AC and DC linearity for precision sensor read-back. The single-channel input simplifies firmware and routing when only one precision voltage must be measured. Typical applications for the ISL26311FBZ-T7A include industrial process control, isolated sensor front-ends, multichannel data-acquisition systems where it is paired with multiplexers, battery management monitoring, and portable medical instrumentation. The differential input allows direct connection to bridge sensors such as load cells and strain gauges without an external instrumentation amplifier, reducing board area and cost. When designing with this ADC, ensure the analog supply is well decoupled with a 10 uF bulk plus 0.1 uF ceramic placed as close as possible to the AVDD pin. Reference decoupling on the REF pin is critical to achieving rated noise performance. The digital lines should be kept short and routed away from the analog input to minimize coupling. This page synthesizes distributor pricing, the ISL2631x pin-compatible family, and practical design notes that are not collated in the manufacturer datasheet.
ISL26312FVZ - 12-bit 125kSPS 2-ch Diff SAR ADC | Renesas
The Renesas ISL26312FVZ is a 12-bit, 125 kSPS, dual-channel differential-input successive-approximation-register (SAR) analog-to-digital converter housed in a 16-pin TSSOP package. It operates from a single 2.7 V to 5.25 V analog supply with a separate digital I/O supply (1.8 V to AVDD), supports single-ended or true differential inputs, and provides an SPI-compatible serial interface with daisy-chain capability. The part is pin-compatible with the wider ISL26310/11/13/14/15/19 family, allowing channel-count scaling without board rework. A SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm and a precision internal DAC to converge on the input voltage in one conversion cycle per bit. SAR ADCs sit in the broader category hierarchy of data converter -> ADC -> successive-approximation ADC -> precision data acquisition IC, and are typically chosen over delta-sigma converters when low latency (no pipeline delay), wide input bandwidth, and true-differential inputs are required in industrial control and instrumentation front ends. Key features include excellent linearity over supply and temperature, an input multiplexer combined with a low-drive buffer amplifier that relaxes external driver requirements, and a proprietary input MUX that supports 1-, 2-, 4-, and 8-channel single-ended configurations as well as 1-, 2-, and 4-channel differential configurations across the family. Typical INL/DNL is better than 1 LSB and the device draws only a few mW at full throughput, making it suitable for battery-powered monitoring. Typical applications include industrial process control loop measurement, multi-channel sensor data acquisition (temperature, pressure, strain gauges), battery monitoring and management systems, motor-control feedback, and instrumentation front-ends that require low-latency differential conversion. Designers appreciate the combination of small TSSOP footprint, simple SPI interface, and high DC accuracy. When designing with this device, place the analog and digital ground planes with proper partitioning and keep the REFIN decoupling capacitor as close to the pin as possible to maintain DC accuracy. Use a low-impedance input buffer when driving the AIN pins from high-impedance sensors. This page synthesizes distributor pricing, drop-in pin-compatible alternatives within the ISL2631x family, and practical design notes that complement the manufacturer datasheet for fast design-in decisions.
ISL26312FVZ-T - 12-bit 125kSPS SAR ADC, 2-ch Diff | Renesas
The Renesas ISL26312FVZ-T is a 12-bit, 125 kSPS successive-approximation register (SAR) analog-to-digital converter with two differential input channels, offered in a 16-pin TSSOP package for industrial and instrumentation front-ends. As a member of the ISL26310/11/12/13/14/15/19 family, it provides excellent linearity across supply and temperature variations while consuming only 11 mW at full throughput and dropping to a typical 8 µA between conversions when auto power-down is enabled, making it well suited for battery-aware data-acquisition systems. A SAR ADC is a converter architecture that performs a binary search through an internal capacitive charge-redistribution DAC, evaluating one bit per conversion clock and producing the result on a single clock cycle without requiring a pipeline delay. SAR ADCs are prized for low-latency triggering, deterministic behavior on multiplexed inputs, and excellent DC linearity with no missing codes - and they remain the dominant choice for multi-channel precision industrial front-ends where both sample-accurate acquisition and lowest idle power matter. Key specifications of this part include 12-bit resolution, 125 kSPS maximum sampling rate, ±10 V input range when configured for bipolar operation, true-differential analog inputs, an SPI-compatible serial interface, single 2.7 V to 5.25 V supply operation, and automotive-grade -40 °C to +125 °C temperature support. The 0.7 LSB typical DNL, on-chip track-and-hold, and integrated input multiplexer enable direct sensor interfacing with minimal external signal conditioning. The on-chip sequencer and auto power-down state machine, combined with a flexible analog input mux, make the ISL26312FVZ-T straightforward to drop into multiplexed sensor panels, isolated transducer front-ends, and process-control loops. The SPI port operates in mode 0 and mode 3 and is easily framed by most FPGAs, microcontrollers, and digital isolators, so a single part can serve both 3.3 V MCU rails and 5 V legacy PLC backplanes. Typical uses include industrial process instrumentation, multi-channel data loggers, motor-control feedback, isolated sensor readouts, and precision weigh-scale / strain-gauge signal chains. The wide 2.7 V to 5.25 V supply range tolerates either a regulated 3.3 V rail or a 5 V USB- or PLC-derived supply. Across all of these uses, the TSSOP-16 footprint keeps the converter area cost low and routing simple. When designing with this device, place a 100 nF decoupling capacitor within 5 mm of the AVDD pin and a 10 µF bulk capacitor on the analog supply, route the analog and digital grounds through a star tie at the AGND pin, and verify SPI mode (CPOL/CPHA) against the host controller. For low-distortion input buffers, an op-amp rail-to-output driver such as the OPA2188 is recommended to avoid degrading the converter's DNL. This page combines distributor pricing, pin-compatible drop-in alternatives, and application design notes into a single reference - saving engineering time versus cross-checking three separate component databases.
ISL26312FVZ-T7A - 12-bit 125kSPS Dual-Channel SAR ADC | Renesas
The Renesas ISL26312FVZ-T7A is a 12-bit, 125 kSPS low-power successive-approximation-register (SAR) analog-to-digital converter (ADC) with two differential input channels, packaged in a 16-pin TSSOP and shipped on a 7-inch tape-and-reel carrier. A SAR ADC is a type of data converter that compares the sampled input voltage against a precision DAC one bit at a time over successive clock cycles, achieving deterministic latency and excellent DC accuracy at moderate sampling rates. SAR converters sit in the broader hierarchy: data converter -> ADC -> SAR ADC -> precision acquisition IC -> mixed-signal semiconductor. They are preferred over delta-sigma or pipeline ADCs whenever multiplexed multi-channel inputs, low power, simple SPI/QSPI/MICROWIRE digital interfaces, and excellent AC performance are needed in industrial instrumentation. Key features of the ISL26312FVZ-T7A include 12-bit resolution, 125 kSPS throughput, two differential input channels (selectable from up to four single-ended or two differential inputs through an internal analog multiplexer), an SPI/QSPI/MICROWIRE-compatible serial interface, and a wide 2.7 V to 5.25 V analog supply range that supports single-supply 3.3 V or 5 V rails. Technical depth comes from the proprietary input multiplexer with an integrated input buffer amplifier, which reduces input drive requirements and minimizes channel-to-channel crosstalk. The device draws microamp-level supply current at lower sample rates, and offers a hardware power-down pin for battery-sensitive applications. Linearity is maintained across the industrial -40 C to +125 C temperature range, supported by a built-in track/hold and a robust internal reference option. Typical applications include industrial process control loops, multi-channel data-acquisition front-ends, isolated sensor signal chains, PLC analog input modules, and battery-powered instrument clusters where the combination of low power draw and clean 12-bit DC performance yields high measurement integrity. When designing with this part, place a 10 nF ceramic decoupling capacitor directly at the AVDD pin and a 1 uF bypass at DVDD to keep the SAR comparator noise floor low. The REFIN/REFOUT pin accepts either an external reference or uses the internal 2.5 V reference - drive REFOUT with a low-ESR 10 uF ceramic for best AC performance. This page synthesizes distributor pricing, drop-in alternatives within the ISL26310/11/12/13/14/15/19 family, and practical design notes not collected in the manufacturer datasheet alone.
ISL26314FVZ - 12-bit 125kSPS 4-CH Differential SAR ADC | Renesas
The Renesas ISL26314FVZ is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter with 4 differential input channels, packaged in a 16-pin TSSOP. It operates from a single 2.7 V to 5.25 V analog supply and a 1.8 V to 3.6 V digital supply, drawing only 6.4 mW at full speed, which makes it well-suited to low-power multi-channel data-acquisition front-ends. What is a SAR ADC? A successive-approximation-register analog-to-digital converter is a sampling ADC architecture that performs one bit-trial per clock cycle using a binary search across an internal capacitive DAC. SAR ADCs are valued for deterministic latency (one conversion = N clock cycles), zero pipeline delay, excellent DC linearity, and low power consumption - they sit in the IC hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. SAR converters are preferred over delta-sigma converters for multiplexed multi-channel sampling where per-channel latency must be deterministic, and over pipeline ADCs when power and simplicity matter more than very high sample rates. Key features include 4 differential inputs (expandable to 8 single-ended via software), 125 kSPS maximum throughput, ±1 LSB INL (typical), a proprietary input multiplexer with integrated buffer amplifier that reduces external drive requirements, and a wide operating temperature range of -40°C to +125°C. The device also integrates an internal 2.5 V reference (10 ppm/°C typical), an SPI/QSPI/MICROWIRE-compatible serial interface, and a hardware / software shutdown pin that reduces supply current to under 1 µA between conversions. The ISL26314 is implemented on a low-power CMOS process. An internal charge redistribution DAC combined with the proprietary input multiplexer allows direct connection of high-impedance sensors without external instrumentation amplifiers, simplifying the analog front end. The part is part of a broader pin-compatible family (ISL26310/11/12/13/14/15/19) offering 1, 2, 4, and 8 single-ended and 1, 2, 4 differential channel counts - enabling one PCB layout to scale across product variants. Typical applications include industrial process control, 4-20 mA loop digitization, multi-cell battery monitoring, programmable logic controller (PLC) analog input modules, weigh scales, and temperature measurement front-ends (RTD/thermocouple with external amplifier). When designing with this part, note that the input buffer lowers kick-back current into high-source-impedance sensors, but adding an RC anti-alias filter ahead of the input requires careful selection to avoid degrading settling at 125 kSPS. Use the SHDN pin to drop idle channels to microamp-level quiescent current in battery-powered multi-channel systems. This page synthesizes distributor pricing, same-family pin-compatible drop-in alternatives, and design notes not found in the manufacturer datasheet alone.
ISL26314FVZ-T - 12-bit 125kSPS SAR ADC, 4-Ch Diff | Renesas
The Renesas ISL26314FVZ-T is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter offering 2/4 differential input channels with excellent linearity over supply and temperature variations. It integrates a proprietary input multiplexer and combination buffer amplifier that reduces input drive requirements, simplifying front-end design and lowering system cost. The device is offered in a 16-pin TSSOP (FVZ) package and operates from a single analog supply. An SAR ADC is a successive-approximation-register analog-to-digital converter that uses a binary-search algorithm and an internal capacitive DAC to digitize an analog input in N conversion cycles for N-bit resolution. SAR ADCs are valued in the data-acquisition hierarchy for their deterministic latency, lack of pipeline delay, and low power consumption compared to pipelined ADCs, making them well suited to multiplexed multi-channel systems, industrial control loops, and battery-powered instrumentation. Key features of the ISL26314FVZ-T include 12-bit resolution with no missing codes, 125 kSPS maximum sampling rate, single-ended and differential input configurations, an integrated input multiplexer, an internal reference / buffer, and low power consumption suitable for portable applications. The part supports 2-channel single-ended or 1-channel differential input operation with SPI/QSPI/MICROWIRE-compatible serial interface, and operates across an extended industrial temperature range. Compared with rival 12-bit SAR ADCs, the integrated front-end buffer minimizes external op-amp stages and reduces BOM count. Internally, the ISL26314FVZ-T uses a charge-redistribution DAC architecture with a sample-and-hold front-end and on-chip digital correction. The input buffer amplifier provides high-impedance, low-leakage signal acquisition across the full analog input range, and the digital interface is designed for low-EMI operation in noise-sensitive systems. The architecture delivers excellent INL/DNL performance while consuming minimal supply current at lower throughput rates. Typical applications include industrial process control and data acquisition, portable and battery-powered instrumentation, multi-channel sensor monitoring, and medical instrumentation. The wide input range and integrated input mux make it particularly well-suited to multi-sensor systems requiring sequential channel scanning with consistent conversion accuracy. When designing with this part, ensure that the analog and digital ground returns are joined at a single star point beneath the ADC to minimize digital switching noise coupling into the analog input. Use a low-ESR 10 µF bypass capacitor close to the supply pin in parallel with a 0.1 µF ceramic for high-frequency decoupling. Verify SPI timing against your controller's worst-case SCLK rise/fall times before committing to layout. This page synthesizes distributor pricing, drop-in alternatives from the same SAR-ADC family, and practical design notes not assembled in any single manufacturer document.
ISL26315FVZ - 12-bit 125kSPS 4-CH SAR ADC | Renesas / Intersil
The Renesas / Intersil ISL26315FVZ is a 12-bit, 125 kSPS, 4-channel single-ended input successive-approximation-register (SAR) analog-to-digital converter (ADC) housed in a 16-pin TSSOP package. It operates from a 2.7 V to 5.25 V analog and digital supply and supports an SPI-compatible serial interface, making it well-suited for low-power multi-channel data-acquisition systems. An ADC (Analog-to-Digital Converter) is an integrated circuit that samples a continuous analog voltage and converts it into a discrete digital code. SAR ADCs use a binary-search successive-approximation algorithm with an internal sample-and-hold and DAC; they deliver deterministic latency, low latency per conversion, and excellent DC linearity with no pipeline delay. The ISL26315 belongs to the broader product hierarchy of data converter -> ADC -> SAR ADC -> precision mixed-signal IC, sitting under the data acquisition category that includes successive-approximation, sigma-delta, and pipeline architectures. Key specifications of the ISL26315FVZ include 12-bit resolution, 125 kSPS maximum sampling rate, 4 single-ended input channels (selectable through an input multiplexer), integrated input buffer amplifier that lowers the input drive requirements, and up to 5 kV Human Body Model ESD survivability on the analog inputs. The converter is specified for the industrial temperature range of -40 °C to +125 °C and is offered in the TSSOP-16 surface-mount package. The internal architecture combines a proprietary input multiplexer, a unity-gain input buffer that reduces the source-impedance burden on external driving circuitry, a high-accuracy comparator, an internal DAC, and a successive-approximation register. This topology achieves excellent linearity over supply and temperature variations and produces accurate conversions without requiring external signal conditioning in most low-frequency applications. Typical applications for the ISL26315FVZ include industrial process control and instrumentation, multi-channel sensor monitoring (thermocouple, RTD, bridge, and 4-20 mA loop read-back via an external shunt), battery management system cell voltage and current monitoring, factory automation analog front ends, programmable logic controller (PLC) analog input modules, and general-purpose data-acquisition boards requiring up to four simultaneously-sampled-or-multiplexed single-ended channels. When designing with the ISL26315FVZ, place a 0.1 µF decoupling capacitor as close as possible to each supply pin (AVCC and DVDD) and provide a low-impedance ground return; add a small RC anti-alias filter at each analog input to attenuate out-of-band noise above the Nyquist frequency (≈62.5 kHz at 125 kSPS). This page synthesizes distributor pricing from Mouser, DigiKey, LCSC and Octopart, pin-compatible drop-in alternatives from the ISL2631x family and competing SAR ADCs, and practical design notes that complement - but do not replace - the manufacturer datasheet.
ISL26315FVZ-T - 12-bit 125kSPS 4-ch SAR ADC | Renesas
The Renesas ISL26315FVZ-T is a 12-bit, 125 kSPS successive-approximation-register (SAR) analog-to-digital converter with four single-ended input channels and SPI-compatible serial interface, housed in a 16-pin TSSOP package. It operates from a single 2.7 V to 5.25 V analog supply, achieves ±1 LSB INL/DNL over the industrial -40 °C to +125 °C temperature range, and consumes only 11 mW at full 125 kSPS throughput. A successive-approximation-register ADC is a precision data converter that performs a binary search against an internal DAC to digitize an analog input in one conversion cycle per bit. SAR ADCs sit within the broader data-converter hierarchy (ADC -> data converter -> mixed-signal IC -> semiconductor), and the ISL26315FVZ-T family (ISL26310–ISL26319) combines this SAR core with a proprietary input multiplexer and integrated buffer amplifier to simplify front-end design while maintaining low-noise linearity. Key features include a proprietary input multiplexer plus combination buffer amplifier that reduces input drive requirements, SPI/QSPI/MICROWIRE-compatible serial interface, hardware and software reset options, 5 kV Human Body Model ESD survivability, and an Auto Power-Down mode that drops operating current to a typical 8 µA between conversions. The TSSOP-16 footprint also supports easy layout on mixed-signal PCBs. Architecturally, the device uses a low-power SAR core with internal track-and-hold, an on-chip reference buffer, and a flexible input channel sequencer that lets a single host controller scan multiple single-ended or differential channels. The 8-channel-input family member (ISL26319) shares the same digital interface, allowing firmware reuse across channel counts. Typical applications include portable industrial data loggers, multi-sensor 4-20 mA loop digitization, battery-powered instrumentation, factory automation sensor front ends, and process-control analog input modules. The wide 2.7-5.25 V supply range makes the part compatible with both 3.3 V and 5 V microcontroller rails. When designing with this part, place 100 nF decoupling capacitors as close as possible to AVDD and DVDD pins, route the analog and digital grounds as separate planes joined at a single point under the IC, and leave the SHDN pin properly pulled to enable Auto Power-Down for battery savings. If higher channel counts are needed, migrate to the pin-compatible ISL26319 (8 single-ended inputs) rather than cascading multiple parts. This page synthesizes distributor pricing, drop-in alternatives, and practical PCB/design notes not found in the manufacturer datasheet.
ISL26315FVZ-T7A - 12-bit 125kSPS 4-CH SAR ADC | Renesas
The Renesas ISL26315FVZ-T7A is a 12-bit, 125 kSPS, 4-channel single-ended SAR analog-to-digital converter (ADC) housed in a 16-pin TSSOP package. It combines a proprietary input multiplexer and combination buffer amplifier that reduces external drive requirements, while a hardware-resettable sequencer simplifies multi-channel scanning without software intervention. Operating from a 2.7 V to 5.25 V analog supply and a 1.68 V to 5.25 V digital supply, the part is targeted at low-power precision data acquisition systems where multi-channel throughput and small PCB footprint matter. A SAR ADC is a successive-approximation-register analog-to-digital converter that performs one conversion per clock cycle using a binary-search algorithm against an internal precision DAC, then digitizes a single input sample per acquisition. Unlike delta-sigma ADCs, SAR converters offer deterministic latency, no pipeline delay, and excellent DC accuracy, which is why they dominate multiplexed data acquisition, industrial process control, and precision instrumentation. The ISL26315FVZ-T7A fits the SAR -> ADC -> data converter -> signal chain IC hierarchy. Key parametric features include ±1 LSB INL/DNL (max), 4 single-ended analog inputs routed through an internal MUX, an SPI/QSPI/MICROWIRE-compatible serial interface, and a hardware pin-selectable sequencer that cycles through pre-programmed input channels. The device supports both unipolar (0 to VREF) and bipolar (programmed through input scaling) input ranges by changing the reference voltage. Architecturally, the ISL26315FVZ-T7A uses a charge-redistribution DAC array with a high-impedance input stage. The internal buffer allows direct connection to high-impedance sources, while the SAR engine completes a 12-bit conversion in 8 µs. Power consumption scales linearly with sample rate, drawing roughly 3 mA at 125 kSPS and dropping into the µA range at lower throughput, enabled by an automatic power-down between conversions. Typical applications include industrial process control, battery-powered instrumentation, multi-channel sensor monitoring (temperature, pressure, strain gauges), and portable medical devices. The wide supply range and internal buffer make it ideal for monitoring multiple transducers with one ADC. Design consideration: place a 10 µF tantalum plus 0.1 µF ceramic bypass close to pins 13 (AVDD) and 2 (DVDD), and keep the analog ground return isolated from digital switching currents. Decoupling and short analog traces are critical for meeting the ±1 LSB linearity spec. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
ISL26319FVZ - 12-bit 125kSPS 8-ch SAR ADC | Renesas
The Renesas ISL26319FVZ is a 12-bit, 125 kSPS, low-power successive-approximation-register (SAR) analog-to-digital converter offering 8 single-ended or 4 differential input channels in a 16-pin TSSOP package. It integrates a proprietary input multiplexer and combination buffer amplifier that lowers the driving requirements on the front-end signal source. The device operates from a 2.7 V to 5.25 V analog supply, drawing only 2.5 mA typical supply current at full speed, and includes a separate digital I/O supply pin (VDD) for easy interfacing to 1.8 V to 5.25 V logic. A SAR ADC is a type of analog-to-digital converter that uses a binary-search algorithm with a comparator and a precision DAC to resolve each conversion one bit at a time. SAR ADCs sit in the broader taxonomy of mixed-signal data converters -> ADCs -> SAR ADCs -> low-power precision ADCs -> integrated circuits. They are favored for industrial instrumentation because they offer deterministic latency, no pipeline delay, and excellent linearity over supply and temperature variations without the power cost of delta-sigma or pipeline architectures. Key features of the ISL26319FVZ include 12-bit resolution with no missing codes, 125 kSPS maximum sampling rate, INL of ±0.5 LSB (typical), single-ended and pseudo-differential input modes, an on-chip track-and-hold amplifier, and an SPI-/QSPI-/MICROWIRE-compatible serial interface. The integrated input buffer eliminates the need for an external op-amp, reducing BOM cost and board area in multichannel systems. Technically, the device uses a charge-redistribution DAC array together with a high-bandwidth comparator and a precision reference input. Channel switching is performed through a low-leakage CMOS multiplexer with break-before-make sequencing to prevent channel-to-channel crosstalk. The reference voltage range accepts up to VDD, and the part offers an explicit power-down mode that drops consumption below 1 µA, making it suitable for battery-powered or duty-cycled data acquisition. Typical applications include industrial process control and PLC analog input modules, multi-channel data acquisition systems for instrumentation, sensor signal conditioning front-ends (thermocouple, RTD, strain-gauge bridges), portable/battery-powered medical monitoring equipment, and factory automation I/O. The 8-channel single-ended capability is particularly useful in systems that aggregate many slow-moving analog signals. When designing with this ADC, place the reference decoupling capacitor (typically 10 µF ceramic plus 0.1 µF) directly at the REF pin with the shortest possible trace to minimize conversion noise. Route analog and digital grounds as a star-grounded split with a single tie-point under the IC, and avoid switching digital signals near the analog input traces to preserve the converter's SNR. This page synthesizes Renesas distributor pricing, pin-compatible same-family alternatives (ISL26315FVZ, ISL26312FVZ, ISL26311FBZ), and practical design notes not found in the manufacturer datasheet alone.
ISL26319FVZ-T - 12-bit 125kSPS 8-CH SAR ADC | Renesas
The Renesas ISL26319FVZ-T is a 12-bit, 125 kSPS, 8-channel single-ended (4-channel differential) successive-approximation analog-to-digital converter (SAR ADC) in a 16-pin TSSOP (FVZ) package, specified over the industrial -40C to +125C range. The -T suffix denotes tape-and-reel shipping. According to the Renesas datasheet, the part accepts single supplies from 2.7 V to 5.25 V, draws 11 mW (typical 8 uA between conversions in Auto Power-Down), and provides a true-differential input stage with proprietary input multiplexer/combination buffer that lowers input drive requirements. SAR ADCs are a class of analog-to-digital converters that resolve one bit per clock cycle through a switched-capacitor binary-weighted DAC. They are prized for deterministic latency, no pipeline delay, excellent DC linearity, and low power consumption at modest sample rates, making them a standard choice for industrial process control, instrumentation, data-acquisition front-ends, and multi-channel sensor readouts. Within the converter hierarchy, the ISL26319FVZ-T sits at the precision-low-power-mid-speed tier (12-bit, 125 kSPS), above micro-power 8/10-bit SARs and below 16/18/24-bit precision SARs or sigma-delta converters. Key features include 8 single-ended input channels (or 4 differential), an SPI-compatible serial interface for configuration and data read-back, integrated input buffer with high impedance, an internal 4.096 V or external reference option, and an auto power-down mode that drops quiescent current to microampere levels between conversions. The wide supply range allows direct connection to 3.3 V or 5 V rails commonly found in industrial and battery-backed systems. Typical applications include multi-channel data-acquisition modules, process-control sensor reading (temperature, pressure, strain-gauge bridges with external signal conditioning), battery monitoring in 12-24 V systems, PLC analog input cards, and portable instrumentation where low average power is mandatory. Designers should provide a clean analog ground plane, decouple AVDD with a low-ESR 1 uF/100 nF pair, and observe the 50 ns minimum CS setup time. Auto power-down timing must be honored to achieve the 8 uA typical standby figure. This page consolidates distributor pricing, drop-in alternatives, and design notes not found in the manufacturer datasheet.
ISL26320FBZ-T7A - 12-bit 250kSPS 1-Ch SAR ADC | Renesas
The Renesas ISL26320FBZ-T7A is a 12-bit, 250 kSPS, single-channel, low-power SAR (Successive Approximation Register) analog-to-digital converter with serial interface in a 8-pin SOIC N package. It accepts single-ended and differential input signals, operates from a 2.7 V to 5.25 V analog supply, and provides SPI-/QSPI-/MICROWIRE-compatible serial output for direct connection to microcontrollers and DSPs. The -T7A suffix indicates 7-inch (178 mm) tape-and-reel packaging. A SAR ADC is a type of analog-to-digital converter that uses a binary search algorithm to determine each bit of the conversion result. SAR ADCs are prized for low power consumption, zero-latency single-shot conversions, and excellent DC linearity. They sit beneath the broader ADC hierarchy (SAR -> Nyquist ADC -> data converter -> mixed-signal IC), sharing the family with delta-sigma, pipeline, and flash architectures. SAR converters typically dominate applications in the 8- to 16-bit range and 100 kSPS to 1 MSPS throughput band - exactly the niche the ISL26320 family targets. Key specifications include 12-bit resolution, 250 kSPS maximum sample rate, low single-ended and differential input support, and an integrated input multiplexer plus combination buffer amplifier that lowers the external drive requirement. The proprietary input stage simplifies the signal chain, reducing overall BOM cost and PCB area in multi-channel and battery-powered designs. The device belongs to the ISL26320/21/22/23/24/25/29 pin-compatible family from Renesas, which scales channel count and sample rate across the portfolio. The ISL26320 is the 1-channel, 250 kSPS entry point. It uses a bipolar CMOS process variant with trimmed thin-film resistors, achieving excellent linearity over the rated -40 °C to +85 °C industrial temperature range. Typical applications include industrial process control, portable instrumentation, battery-powered data loggers, sensor signal conditioning, and multi-channel data-acquisition front-ends where low power and small footprint matter. Its single 5 V supply operation suits industrial 24 V bus systems after front-end regulation. When designing in this ADC, decouple AVDD and DVDD separately with 0.1 µF ceramic capacitors close to the pins, and provide a clean low-impedance reference. Place the analog and digital grounds on split planes joined under the ADC. Note that the wider ISL2632x family footprint remains pin-compatible across channel-count variants, simplifying PCB scaling. This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet alone, helping engineers select and source this Renesas SAR ADC efficiently.
ISL26323FBZ - 12-Bit 250kSPS Dual-Channel SAR ADC | Renesas
The Renesas ISL26323FBZ is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with two single-ended input channels, housed in an 8-pin SOIC (NB) package. It supports an analog input range of 0 V to VREF (with VREF up to 5 V) and operates from a single 2.7 V to 5.25 V analog supply, drawing only 2.5 mA typical supply current at 250 kSPS. An analog-to-digital converter (ADC) is a data converter that translates real-world continuous voltages into discrete digital codes. SAR ADCs in particular use a binary-search capacitor array and comparator to resolve one bit per clock cycle, delivering deterministic latency with no pipeline delay - which makes them well suited to multiplexed multi-channel data-acquisition systems and control loops where deterministic timing matters. The ISL26323 sits in the precision-data-acquisition product hierarchy: SAR ADC -> ADC -> data converter -> signal chain IC -> semiconductor. Key features include INL of ±1 LSB maximum, DNL of ±1 LSB maximum, an internal 2.5 V reference option (with external reference override up to 5 V), an SPI-/QSPI-/MICROWIRE-compatible serial interface, a hardware SHND pin, and a true-differential analog input structure that rejects common-mode noise. The 8-pin SOIC footprint simplifies PCB layout and is compatible with standard surface-mount assembly lines. The device uses a charge-redistribution SAR core with a proprietary input multiplexer and input buffer, lowering the drive requirement on the upstream sensor or instrumentation amplifier. A throughput of 250 kSPS is sufficient for vibration, motor-control, and precision-sensor signal chains that previously required expensive delta-sigma converters. Typical applications include industrial process control loop digitization, multi-channel temperature sensing via RTD or thermocouple front ends, battery-cell voltage monitoring in 12 V/24 V/48 V battery-management systems, portable instrumentation, and PLC analog input modules. The wide supply range and small footprint also suit it to point-of-load digitization in factory-automation I/O cards. When designing with the ISL26323FBZ, treat the analog ground return as a star-grounded island separate from noisy digital returns; route SCLK, SDO, and CONVST traces over a continuous ground plane to limit digital coupling into the sample-and-hold. The shutdown pin can cut supply current to under 1 microamp for battery-powered sensor nodes. This page synthesizes distributor pricing for the ISL26323FBZ, drop-in same-package alternatives from the ISL263xx family, and practical PCB and reference-layout notes not found in the manufacturer datasheet, giving engineers a single, citation-ready reference for new designs and field replacements.
ISL26323FBZ-T - 12-bit 250kSPS Dual-Channel Low-Power SAR ADC | Renesas
The Renesas ISL26323FBZ-T is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with two differential input channels, housed in an 8-pin SOIC (N) package. It supports both single-ended and differential input modes, offers a serial SPI-compatible digital interface, and operates from a 2.7 V to 5.25 V analog supply. The device is part of the ISL26320/21/22/23/24/25/29 low-power SAR ADC family, which features excellent linearity over supply and temperature variations. A SAR ADC is a type of analog-to-digital converter that uses a binary-search successive-approximation algorithm to convert an analog input to a digital code in a fixed number of clock cycles, typically one per bit. SAR ADCs sit within the broader data-converter family (SAR -> ADC -> data converter -> mixed-signal IC -> semiconductor), and are valued for their deterministic latency, low power consumption, and high effective resolution per sample. The ISL26323FBZ-T specifically targets the 12-bit precision segment with sample rates up to 250 kSPS, making it well suited for industrial sensor readout, multi-channel data acquisition, and instrumentation front ends. Key features of the ISL26323FBZ-T include up to 5 kV Human Body Model ESD survivability, guaranteed monotonic operation, and an industrial temperature range of -40 °C to +125 °C. Its single-ended/differential input flexibility allows the same PCB footprint to accept either sensor type without a re-design, while the SPI/serial digital interface reduces microcontroller pin count compared to parallel-output ADCs. Typical applications include industrial process control loops, multi-channel temperature and pressure monitoring, PLC analog input modules, battery-cell voltage monitoring in BMS front ends, and general-purpose data-acquisition systems. The wide analog supply range (2.7 V to 5.25 V) supports both 3.3 V and 5 V microcontroller environments with the same BOM. When designing with this part, ensure the analog and digital grounds are tied together at a single point near the IC, and place the 10 µF bulk + 0.1 µF bypass capacitors as close to the AVDD pin as possible. The SOT-23-6/8-SOIC thermally enhanced package allows continuous operation at full sample rate without thermal throttling, but the input RC antialiasing filter should be sized to keep the -3 dB bandwidth below the Nyquist frequency of 125 kHz for 250 kSPS throughput. This page synthesizes verified distributor pricing, pin-compatible drop-in alternatives, and practical design notes not consolidated in the Renesas datasheet PDF.
ISL26323FBZ-T7A - 12-bit 250kSPS SAR ADC, 2-Ch | Renesas
The Renesas ISL26323FBZ-T7A is a 12-bit, 250 kSPS successive-approximation (SAR) analog-to-digital converter with two single-ended input channels (or one differential channel), offered in an 8-pin SOIC package on a 7-inch tape-and-reel carrier (T7A suffix). It belongs to the ISL26320/21/22/23/24/25/29 ADC family from Renesas (originally Intersil) and is specified over the -40 °C to +125 °C automotive temperature range, drawing only a few milliwatts from a single analog supply. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a conversion topology that uses a binary-search algorithm against an internal precision DAC to digitize an input voltage in N clock cycles for N-bit resolution. SAR ADCs occupy the middle ground between high-speed flash converters and high-precision delta-sigma converters, combining low latency (no digital filter delay), deterministic throughput, and strong dynamic performance for multiplexed multi-channel data-acquisition systems where the input must settle and convert on every sample period. The defining features of the ISL26323FBZ-T7A are its 12-bit resolution, 250 kSPS guaranteed sampling rate, integrated input multiplexer, proprietary input buffer amplifier that lowers the driving amplifier requirements, a flexible serial interface (SPI/QSPI/MICROWIRE-compatible plus DSP-mode framing), and very low power consumption. The high linearity is maintained over supply and temperature, enabling true 12-bit performance without calibration in tightly-budgeted industrial loops. Architecturally, the part pairs an inherent low-noise charge-redistribution DAC with a SAR engine and an on-chip track-and-hold. The internal buffer reduces the burden on the upstream op-amp, so designers can use lower-power amplifiers and still meet the 250 kSPS settle requirement on the multiplexer output, which simplifies the analog front end. Typical applications include factory-automation analog input modules, multi-channel sensor-digitizer boards, portable instrumentation, weigh scales, process-control I/O, and automotive telematics/sensor ECUs. The wide operating range and small footprint also suit battery-powered data loggers and isolated data-acquisition front ends. When designing with this ADC, sequence the analog supply with a low-noise LDO such as the ISL75051SRH or TPS7A4700, place a 10 nF ceramic bypass right at the AVDD pin, and keep the analog and digital grounds joined at a single point under the exposed pad or a guard ring. Source impedance below 500 Ω preserves linearity at the highest conversion rates. This page synthesizes distributor pricing, drop-in same-family and cross-brand alternatives, and practical design notes that go beyond the manufacturer datasheet to help engineers shorten their bring-up time.
ISL26324FVZ - 12-bit 250kSPS 4-ch SAR ADC | Renesas
The Renesas ISL26324FVZ is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with 4 single-ended (or 2 differential) input channels, housed in a 16-pin TSSOP package. The device operates from a 2.7 V to 5.25 V analog supply and draws low power across the sample-rate range, making it well suited to multi-channel industrial instrumentation and battery-powered monitoring front-ends. An on-chip proprietary input multiplexer and combination buffer amplifier reduce the external drive requirements on each input source. A SAR ADC operates by performing a binary search through an internal capacitive DAC, comparing the sampled input against successively switched reference levels on each clock cycle. The architecture delivers zero-latency conversions (a single-cycle latency at the digital interface) and excellent linearity over supply and temperature variations. SAR ADCs sit inside the broader data-converter taxonomy between delta-sigma converters (which prioritize resolution at low speeds) and flash converters (which prioritize speed at low resolution), and are typically the preferred choice for multiplexed mid-speed multi-channel acquisition where channel switching on every cycle is acceptable. Key specifications include ±1 LSB INL and DNL over temperature, throughput up to 250 kSPS in normal mode, integrated input buffers, an SPI-compatible serial interface, and a TSSOP-16 footprint with -40 °C to +85 °C (or extended automotive) operating range. The combination buffer amplifier allows direct connection to high-impedance sensors and to signal-conditioning circuits without external op-amps. Power consumption scales with the configured sample rate, enabling software-managed trade-offs between speed and dissipation. Typical applications include multi-channel industrial process instrumentation, factory-automation analog input modules, battery-cell voltage monitoring in battery-management systems, programmable logic controller (PLC) analog front-ends, and isolated data-acquisition front-ends. The wide supply range (2.7 V – 5.25 V) also makes the part suitable for 3.3 V and 5 V digital systems that share a common supply rail with downstream logic. When designing the analog front-end, keep source impedances low and decouple AVDD and DVDD with 10 µF bulk plus 0.1 µF ceramic capacitors placed within 5 mm of the supply pins. The REF input requires a low-noise, low-drift reference; a single REF decoupled with 10 µF and 0.1 µF on the pin delivers rated performance. Use the chip-select pin for multi-device SPI bus sharing, and follow standard SPI mode-0 or mode-3 timing as documented in the datasheet. This page synthesizes distributor pricing, drop-in alternatives from the same TSSOP-16 SAR family, and practical design notes not found in the manufacturer datasheet.
ISL26324FVZ-T - 12-bit 250kSPS 4-ch SAR ADC | Renesas
The Renesas ISL26324FVZ-T is a 12-bit, 250 kSPS successive-approximation-register (SAR) analog-to-digital converter with four single-ended and two differential input channels, housed in a 16-pin TSSOP package. According to the Renesas datasheet, it operates from a single 2.7 V to 5.25 V analog supply, delivers ±1 LSB INL and DNL, and consumes 15 mW typical at full throughput. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples a continuous analog voltage and quantizes it into a discrete binary code. Within the converter taxonomy, SAR ADCs use a binary-search successive-approximation algorithm with an internal sample-and-hold and a precision DAC, providing deterministic latency, low power, and high accuracy at moderate sampling rates (typically up to ~1 MSPS). SAR ADCs are widely used as the precision A/D building block inside data-acquisition systems, motor control loops, instrumentation front-ends, and sensor signal chains where DC accuracy and repeatable sampling latency matter more than raw speed. Key features of the ISL26324FVZ-T include a high-impedance analog input multiplexer with proprietary input buffer that relaxes external driver requirements, an SPI-compatible serial digital interface for easy connection to microcontrollers and FPGAs, an auto power-down mode that reduces operating current to 8 µA typical between conversions, and excellent linearity (THD -82 dBFS) over the full supply and temperature range. The internal architecture combines an input multiplexer, a track-and-hold buffer, the SAR conversion core, and a precision reference input. The serial interface uses simple SCLK, SDOUT and CS lines, supporting read-out rates up to the maximum conversion rate without requiring an external clock. Channel selection and configuration are programmed through the SPI interface. Typical applications include industrial process control, multi-channel sensor monitoring, portable instrumentation, factory automation, and medical patient monitoring. The wide supply range (2.7 V to 5.25 V) makes the part equally at home in 3.3 V microcontroller systems and 5 V industrial backplanes. A key design consideration is the bypass network on AVDD and DVDD: place 10 µF tantalum and 0.1 µF ceramic capacitors within a few millimeters of each supply pin to keep switching transients out of the conversion result. Reference decoupling is also critical, particularly when an external reference is used. This page synthesizes verified distributor pricing, drop-in alternative MPNs from the same ISL2632x family and competitive SAR ADCs, and practical design notes - information gain that is not assembled on the Renesas product page alone.