EP1M350F780C7ES vs EP1M350F780C6N Perbandingan
Perbandingan bersamaan detil EP1M350F780C7ES dari Intel dan EP1M350F780C6N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP1M350F780C7ES | EP1M350F780C6N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Waktu Pembelian Terakhir |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Logic Family | CMOS | CMOS, SRAM-based LUT |
| User I/O Count | 486 pins | — |
| Total Package Pins | 780 pins | — |
| Package Type | FINE LINE BGA-780 | — |
| Package Category | 780-BBGA | — |
| Tegangan Pemuat | 1.8 V | — |
| Maximum Stated Transceiver Data Rate | 1.25 Gbps | — |
| Channels Supported at 1.25 Gbps | 8 channels | — |
| Remaining Channel Limit | 10 channels at 1.0 Gbps or less | — |
| Suhu Kerja | 0 C to 85 C | 0 C to 85 C |
| Clock Data Recovery | Supported | — |
| High-Speed Transceivers | Integrated | — |
| Tipe Mounting | Surface Mount | — |
| Status RoHS | unknown | [DATA_NEEDED: rohs_status] |
| REACH Status | unknown | — |
| Logic Element Count | [DATA_NEEDED: logic element count] | — |
| Embedded Memory Capacity | [DATA_NEEDED: embedded memory capacity] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Tahanan Panas | [DATA_NEEDED: junction-to-ambient thermal resistance] | — |
| Family | — | Mercury (EP1M350) |
| Device Type | — | Loadable Programmable Logic Device (PLD) / FPGA |
| System Gates | — | 350,000 |
| Logic Cells / Elements | — | 14,400 |
| User I/Os | — | 486 |
| Integrated Transceivers | — | Yes, with CDR up to 1.25 Gbps |
| Core Supply Voltage | — | 1.8 V |
| Paket | — | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | S-PBGA-B780 |
| Configuration Interface | — | JTAG (IEEE 1149.1) / passive serial |
| Level MSL | — | [DATA_NEEDED: msl_level] |
| Lead-Free | — | [DATA_NEEDED: lead_free] |
| Architecture | — | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | — | 780 |