EP20K1000CF672C8 vs EP20K1000CF672C8ES Perbandingan
Perbandingan bersamaan detil EP20K1000CF672C8 dari Intel dan EP20K1000CF672C8ES dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP20K1000CF672C8ES - 1M-gate APEX20KE FPGA, 672-BGA | Intel
EP20K1000CF672C8ES ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP20K1000CF672C8 | EP20K1000CF672C8ES |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Waktu Pembelian Terakhir |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Series | APEX 20KC | — |
| System Gates | 1,000,000 | — |
| Logic Elements / Cells | 38,400 | — |
| Embedded RAM | 327,680 bits | — |
| User I/Os | 488 (datasheet), 508 (per some distributor listings) | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Number of Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Number of PLLs | 4 | — |
| Maximum User I/O Pins | 488 | — |
| Process Technology | 0.15 um all-layer copper CMOS | 0.18 µm CMOS |
| Core Voltage (VCCINT) | 1.8 V (typical) | 2.5 V |
| I/O Voltage (VCCIO) | Multi-voltage (LVTTL/LVCMOS/LVDS/SSTL/GTL+ compatible) | — |
| Propagation Delay (typical) | 1.6 ns | — |
| Paket | 672-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| Suhu Kerja | 0C to 85C (commercial) | Commercial (0C to +85C) |
| Configuration Mode | FPP / Passive Serial / JTAG | — |
| Tipe Mounting | Surface Mount (BGA) | Surface Mount (BGA) |
| Status RoHS | unknown (legacy part, verify on lot) | Compliant |
| Family | — | APEX 20K (APEX20KE) |
| Logic Elements | — | 38,400 |
| Typical Gates | — | 25,920 |
| Maximum System Gates | — | 1,000,000 |
| Embedded Memory (ESB) | — | 216 Kbits |
| User I/O Pins | — | 508 |
| Speed Grade | — | C8 |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 |
| PLLs | — | 4 (ClockLock/ClockBoost) |
| Programming Interface | — | JTAG (IEEE 1149.1 / IEEE 1532) |
| Level MSL | — | 3 (168 hours) |