EP20K1000CF672C8N vs EP20K1000CF672C8ES Perbandingan
Perbandingan bersamaan detil EP20K1000CF672C8N dari Intel dan EP20K1000CF672C8ES dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP20K1000CF672C8ES - 1M-gate APEX20KE FPGA, 672-BGA | Intel
EP20K1000CF672C8ES ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP20K1000CF672C8N | EP20K1000CF672C8ES |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Waktu Pembelian Terakhir |
| Device Family | APEX 20KC | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Logic Elements / Cells | 38,400 | — |
| Equivalent Gate Count | 1,000,000 gates | — |
| Embedded Memory (bits) | 327,680 | — |
| Number of I/Os | 488 to 508 | — |
| Number of Pins / Balls | 672 | — |
| Paket | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| Tipe Mounting | Surface Mount | Surface Mount (BGA) |
| Suhu Kerja | 0°C to 85°C (Commercial) | Commercial (0C to +85C) |
| Supply Voltage (Vccint) | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper | 0.18 µm CMOS |
| Internal Operating Frequency (max) | 301.21 MHz | — |
| Propagation Delay (typ.) | 1.6 ns to 1.79 ns | — |
| Architecture | MultiCore (LUT + embedded memory + product-term) | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | — |
| Pin-to-Pin Compatibility | APEX 20KE family (same 672-ball BGA) | — |
| Family | — | APEX 20K (APEX20KE) |
| Logic Elements | — | 38,400 |
| Typical Gates | — | 25,920 |
| Maximum System Gates | — | 1,000,000 |
| Embedded Memory (ESB) | — | 216 Kbits |
| User I/O Pins | — | 508 |
| Speed Grade | — | C8 |
| Core Voltage (VCCINT) | — | 2.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 |
| PLLs | — | 4 (ClockLock/ClockBoost) |
| Programming Interface | — | JTAG (IEEE 1149.1 / IEEE 1532) |
| Level MSL | — | 3 (168 hours) |